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    Semiconductor device and electronic instrument
    1.
    发明授权
    Semiconductor device and electronic instrument 有权
    半导体器件和电子仪器

    公开(公告)号：US07664895B2

    公开(公告)日：2010-02-16

    申请号：US11483538

    申请日：2006-07-11

    申请人： Mihiro Nonoyama ,  Masataka Kazuno

    发明人： Mihiro Nonoyama ,  Masataka Kazuno

    IPC分类号： G06F13/38 ,  G06F3/038

    CPC分类号： G06F13/4072 ,  H01L24/73 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2924/01019 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2924/00012

    摘要： A semiconductor device includes a first semiconductor chip and a second semiconductor chip stacked on the first semiconductor chip. The second semiconductor chip includes a high-speed serial I/F circuit which transfers serial data between the high-speed serial I/F circuit and an external device through a serial bus, and transfers parallel data between the high-speed serial I/F circuit and an internal circuit included in the first semiconductor chip. A physical layer circuit of the high-speed serial I/F circuit is disposed on a first side of the second semiconductor chip which is the short side, and a logic circuit is disposed on a third side opposite to the first side.

    摘要翻译： 半导体器件包括堆叠在第一半导体芯片上的第一半导体芯片和第二半导体芯片。 第二个半导体芯片包括一个高速串行I / F电路，它通过串行总线在高速串行I / F电路和外部设备之间传送串行数据，并在高速串行I / F 电路和包括在第一半导体芯片中的内部电路。 高速串行I / F电路的物理层电路设置在作为短边的第二半导体芯片的第一侧，并且逻辑电路设置在与第一侧相对的第三侧。

    Data transfer control system, electronic instrument, program, and data transfer control method
    2.
    发明授权
    Data transfer control system, electronic instrument, program, and data transfer control method 失效
    数据传输控制系统，电子仪器，程序和数据传输控制方法

    公开(公告)号：US07395365B2

    公开(公告)日：2008-07-01

    申请号：US10625625

    申请日：2003-07-24

    申请人： Shinichiro Fujita ,  Hiroyuki Kanai ,  Tomohiro Uchida ,  Mihiro Nonoyama

    发明人： Shinichiro Fujita ,  Hiroyuki Kanai ,  Tomohiro Uchida ,  Mihiro Nonoyama

    IPC分类号： G06F13/38

    CPC分类号： H04L29/06 ,  H04L69/32

    摘要： A data transfer control system includes: a port control section which controls ports P1 and P2 respectively connected with an electronic instrument PC1 and an electronic instrument PC2; and a bus reset issue section which issues a bus reset. The port P2 is set to a disabled state, and then the bus reset is issued to cause the electronic instrument PC1 to acquire an access right. The port P2 is set to an enabled state after the bus reset has been issued and the electronic instrument PC1 has acquired the access right. After the electronic instrument PC2 has been detected to be in a suspended state, a resume packet is transferred to the electronic instrument PC2. The port P2 is set to a disabled state after the power for the data transfer control system has been turned on.

    摘要翻译： 数据传送控制系统包括：端口控制部，控制分别与电子仪器PC 1连接的端口P1和P2;电子仪器PC2; 以及总线复位问题部分，发出总线复位。 端口P 2被设置为禁用状态，然后发出总线复位以使电子仪器PC 1获取访问权限。 在发出总线复位并且电子仪器PC 1已经获取访问权限之后，端口P 2被设置为使能状态。 在电子仪器PC2被检测到处于暂停状态之后，恢复分组被传送到电子仪器PC 2。 在数据传输控制系统的电源已经接通之后，端口P 2被设置为禁用状态。

    Semiconductor device and electronic instrument
    3.
    发明申请
    Semiconductor device and electronic instrument 失效
    半导体器件和电子仪器

    公开(公告)号：US20070028013A1

    公开(公告)日：2007-02-01

    申请号：US11483556

    申请日：2006-07-11

    申请人： Mihiro Nonoyama ,  Masataka Kazuno

    发明人： Mihiro Nonoyama ,  Masataka Kazuno

    IPC分类号： G06F13/00

    CPC分类号： G06F13/4072 ,  H01L24/73 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2924/01019 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/00012 ,  H01L2924/00

    摘要： A semiconductor device includes a first semiconductor chip, and a second semiconductor chip which includes a high-speed serial I/F circuit which transfers serial data between the high-speed serial I/F circuit and an external device through a serial bus and is stacked on the first semiconductor chip. A pad region in which pads (electrodes) for connecting the external device and the high-speed serial I/F circuit are disposed is provided along a first side of the second semiconductor chip which is the short side. A pad region in which pads for connecting an internal circuit included in the first semiconductor chip and the high-speed serial I/F circuit are disposed is provided along a second side of the second semiconductor chip which is the long side.

    摘要翻译： 半导体器件包括第一半导体芯片和第二半导体芯片，其包括高速串行I / F电路，该高速串行I / F电路通过串行总线在高速串行I / F电路和外部设备之间传送串行数据并被堆叠 在第一个半导体芯片上。 沿着短边的第二半导体芯片的第一侧设置有用于连接外部设备和高速串行I / F电路的焊盘（电极）的焊盘区域。 沿着作为长边的第二半导体芯片的第二侧设置有用于连接包括在第一半导体芯片中的内部电路的焊盘和高速串行I / F电路的焊盘区域。

    Semiconductor device and electronic instrument
    4.
    发明申请
    Semiconductor device and electronic instrument 有权
    半导体器件和电子仪器

    公开(公告)号：US20070028012A1

    公开(公告)日：2007-02-01

    申请号：US11483538

    申请日：2006-07-11

    申请人： Mihiro Nonoyama ,  Masataka Kazuno

    发明人： Mihiro Nonoyama ,  Masataka Kazuno

    IPC分类号： G06F13/00

    CPC分类号： G06F13/4072 ,  H01L24/73 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2924/01019 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2924/00012

    摘要： A semiconductor device includes a first semiconductor chip and a second semiconductor chip stacked on the first semiconductor chip. The second semiconductor chip includes a high-speed serial I/F circuit which transfers serial data between the high-speed serial I/F circuit and an external device through a serial bus, and transfers parallel data between the high-speed serial I/F circuit and an internal circuit included in the first semiconductor chip. A physical layer circuit of the high-speed serial I/F circuit is disposed on a first side of the second semiconductor chip which is the short side, and a logic circuit is disposed on a third side opposite to the first side.

    摘要翻译： 半导体器件包括堆叠在第一半导体芯片上的第一半导体芯片和第二半导体芯片。 第二个半导体芯片包括一个高速串行I / F电路，它通过串行总线在高速串行I / F电路和外部设备之间传送串行数据，并在高速串行I / F 电路和包括在第一半导体芯片中的内部电路。 高速串行I / F电路的物理层电路设置在作为短边的第二半导体芯片的第一侧，并且逻辑电路设置在与第一侧相对的第三侧。

    Semiconductor device and electronic instrument
    6.
    发明授权
    Semiconductor device and electronic instrument 有权
    半导体器件和电子仪器

    公开(公告)号：US08001301B2

    公开(公告)日：2011-08-16

    申请号：US12683171

    申请日：2010-01-06

    申请人： Mihiro Nonoyama ,  Masataka Kazuno

    发明人： Mihiro Nonoyama ,  Masataka Kazuno

    IPC分类号： G06F13/38 ,  G06F3/038

    CPC分类号： G06F13/4072 ,  H01L24/73 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2924/01019 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/00012 ,  H01L2924/00

    摘要： A semiconductor device includes a first semiconductor chip, and a second semiconductor chip which includes a high-speed serial I/F circuit which transfers serial data between the high-speed serial I/F circuit and an external device through a serial bus and is stacked on the first semiconductor chip. A pad region in which pads (electrodes) for connecting the external device and the high-speed serial I/F circuit are disposed is provided along a first side of the second semiconductor chip which is the short side. A pad region in which pads for connecting an internal circuit included in the first semiconductor chip and the high-speed serial I/F circuit are disposed is provided along a second side of the second semiconductor chip which is the long side.

    摘要翻译： 半导体器件包括第一半导体芯片和第二半导体芯片，其包括高速串行I / F电路，该高速串行I / F电路通过串行总线在高速串行I / F电路和外部设备之间传送串行数据并被堆叠 在第一个半导体芯片上。 沿着短边的第二半导体芯片的第一侧设置有用于连接外部设备和高速串行I / F电路的焊盘（电极）的焊盘区域。 沿着作为长边的第二半导体芯片的第二侧设置有用于连接包括在第一半导体芯片中的内部电路的焊盘和高速串行I / F电路的焊盘区域。

    SEMICONDUCTOR DEVICE AND ELECTRONIC INSTRUMENT
    7.
    发明申请
    SEMICONDUCTOR DEVICE AND ELECTRONIC INSTRUMENT 有权
    半导体器件和电子仪器

    公开(公告)号：US20100127768A1

    公开(公告)日：2010-05-27

    申请号：US12683171

    申请日：2010-01-06

    申请人： MIHIRO NONOYAMA ,  Masataka Kazuno

    发明人： MIHIRO NONOYAMA ,  Masataka Kazuno

    IPC分类号： H01L25/00

    CPC分类号： G06F13/4072 ,  H01L24/73 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2924/01019 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/00012 ,  H01L2924/00

    摘要： A semiconductor device includes a first semiconductor chip, and a second semiconductor chip which includes a high-speed serial I/F circuit which transfers serial data between the high-speed serial I/F circuit and an external device through a serial bus and is stacked on the first semiconductor chip. A pad region in which pads (electrodes) for connecting the external device and the high-speed serial I/F circuit are disposed is provided along a first side of the second semiconductor chip which is the short side. A pad region in which pads for connecting an internal circuit included in the first semiconductor chip and the high-speed serial I/F circuit are disposed is provided along a second side of the second semiconductor chip which is the long side.

    摘要翻译： 半导体器件包括第一半导体芯片和第二半导体芯片，其包括高速串行I / F电路，该高速串行I / F电路通过串行总线在高速串行I / F电路和外部设备之间传送串行数据并被堆叠 在第一个半导体芯片上。 沿着短边的第二半导体芯片的第一侧设置有用于连接外部设备和高速串行I / F电路的焊盘（电极）的焊盘区域。 沿着作为长边的第二半导体芯片的第二侧设置有用于连接包括在第一半导体芯片中的内部电路的焊盘和高速串行I / F电路的焊盘区域。

    Semiconductor device and electronic instrument
    8.
    发明授权
    Semiconductor device and electronic instrument 失效
    半导体器件和电子仪器

    公开(公告)号：US07668989B2

    公开(公告)日：2010-02-23

    申请号：US11483556

    申请日：2006-07-11

    申请人： Mihiro Nonoyama ,  Masataka Kazuno

    发明人： Mihiro Nonoyama ,  Masataka Kazuno

    IPC分类号： G06F13/38 ,  G06F3/038

    CPC分类号： G06F13/4072 ,  H01L24/73 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2924/01019 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/00012 ,  H01L2924/00

    摘要： A semiconductor device includes a first semiconductor chip, and a second semiconductor chip which includes a high-speed serial I/F circuit which transfers serial data between the high-speed serial I/F circuit and an external device through a serial bus and is stacked on the first semiconductor chip. A pad region in which pads (electrodes) for connecting the external device and the high-speed serial I/F circuit are disposed is provided along a first side of the second semiconductor chip which is the short side. A pad region in which pads for connecting an internal circuit included in the first semiconductor chip and the high-speed serial I/F circuit are disposed is provided along a second side of the second semiconductor chip which is the long side.

    摘要翻译： 半导体器件包括第一半导体芯片和第二半导体芯片，其包括高速串行I / F电路，该高速串行I / F电路通过串行总线在高速串行I / F电路和外部设备之间传送串行数据并被堆叠 在第一个半导体芯片上。 沿着短边的第二半导体芯片的第一侧设置有用于连接外部设备和高速串行I / F电路的焊盘（电极）的焊盘区域。 沿着作为长边的第二半导体芯片的第二侧设置有用于连接包括在第一半导体芯片中的内部电路的焊盘和高速串行I / F电路的焊盘区域。