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    PWM inverter with zero dead time and initial power supply capacitor charging
    3.
    发明授权
    PWM inverter with zero dead time and initial power supply capacitor charging 失效
    PWM逆变器具有零死区时间和初始电源电容充电

    公开(公告)号：US6021058A

    公开(公告)日：2000-02-01

    申请号：US129428

    申请日：1998-08-05

    申请人： Masahiro Yasohara ,  Yasushi Kato ,  Shinichi Emura ,  Kazuyuki Takada ,  Yuji Tanaka ,  Kouji Takada ,  Ryutaro Arakawa

    发明人： Masahiro Yasohara ,  Yasushi Kato ,  Shinichi Emura ,  Kazuyuki Takada ,  Yuji Tanaka ,  Kouji Takada ,  Ryutaro Arakawa

    IPC分类号： H02M7/48 ,  H02M7/5395

    CPC分类号： H02M7/538

    摘要： A PWM inverter output circuit enabling circuit integration, having a fast response characteristic, and unaffected by dv/dt transients is provided. A predrive circuit 17 drives a power circuit 11 comprising first and second power elements P1 and P2 by controlling the gate and source potential of the power elements P1 and P2 based on a stored control state. The control state is detected from a logic signal output from an input signal processor 13, which converts a command signal instructing turning on and off the power elements P1 and P2 to predetermined logic signals. Operating power is drawn from a main dc power source V1, a control power source V2, and a power supply capacitor C1 that is charged using an output voltage from the control power source V2. The gates and sources of the power elements P1 and P2 are connected together.

    摘要翻译： 提供具有快速响应特性并且不受dv / dt瞬变影响的PWM逆变器输出电路，使能电路集成。 预驱动电路17通过基于存储的控制状态控制功率元件P1和P2的栅极和源极电位来驱动包括第一和第二功率元件P1和P2的电源电路11。 从输入信号处理器13输出的逻辑信号中检测控制状态，该命令将指示将功率元件P1和P2导通和关闭的命令信号转换成预定的逻辑信号。 从主DC电源V1，控制电源V2和使用来自控制电源V2的输出电压进行充电的电源电容器C1抽取工作电力。 功率元件P1和P2的门和源连接在一起。

    Load driving device
    4.
    发明授权
    Load driving device 有权
    负载驱动装置

    公开(公告)号：US06538480B2

    公开(公告)日：2003-03-25

    申请号：US09946295

    申请日：2001-09-04

    申请人： Kouji Takada ,  Seiki Yamaguchi ,  Satoru Takahashi

    发明人： Kouji Takada ,  Seiki Yamaguchi ,  Satoru Takahashi

    IPC分类号： H03K300

    CPC分类号： H03K17/0822 ,  H03K2017/0806

    摘要： A load driving device capable of preventing thermal destruction even when a load short-circuit or an overcurrent occurs, thereby having improved reliability, is provided. A load driving device, in which a power switch element for driving a load and a circuit for controlling the power switch element according to a signal VIN supplied from the outside are formed on one chip, is provided with an OFF-time delaying circuit for delaying an OFF-time transition of a level of an input signal at which the power switch element makes the transition from an ON state to an OFF state, according to a result of detection of a current flowing through the load and the level of the input signal to the power switch element.

    摘要翻译： 提供即使在发生负载短路或过电流时也能够防止热破坏，从而提高可靠性的负载驱动装置。 一个负载驱动装置，其中用于驱动负载的电源开关元件和用于根据从外部提供的信号VIN来控制功率开关元件的电路形成在一个芯片上，设置有用于延迟的关断时间延迟电路 根据检测到流过负载的电流和输入信号的电平的结果，功率开关元件从导通状态转变到断开状态的输入信号的电平的关断时间转换 到电源开关元件。

    Semiconductor device provided with overheat protection circuit and electronic circuit using the same
    5.
    发明授权
    Semiconductor device provided with overheat protection circuit and electronic circuit using the same 有权
    具有过热保护电路的半导体装置及使用其的电子电路

    公开(公告)号：US07310213B2

    公开(公告)日：2007-12-18

    申请号：US10948693

    申请日：2004-09-24

    申请人： Kouji Takada

    发明人： Kouji Takada

    IPC分类号： H02H5/04

    CPC分类号： H03K17/0822 ,  H01L2924/0002 ,  H03K2017/0806 ,  H01L2924/00

    摘要： A overheat protection circuit is formed on the same semiconductor substrate as a power MOS FET is formed on. As the configuration, a first resistor is connected between an input terminal and a gate of the power MOS FET, a second resistor, a temperature sensing element, and a third resistor are connected in this order between the input terminal and a ground point, an FET for clamp is connected in parallel to a series circuit of the temperature sensing element and the third resistor, a series circuit of an FET for current adjustment and a fourth resistor is connected in parallel to the MOS FET for clamp, a series circuit of a fifth and sixth resistors is connected between the input terminal and the ground point, a node of the fifth and sixth resistors is connected to a gate of the FET for current adjustment, an FET for switching is connected between the gate of the power MOS FET and the ground point, and a node of the temperature sensing element and the third resistor is connected to a gate of the FET for switching.

    摘要翻译： 在形成功率MOS FET的同一半导体衬底上形成过热保护电路。 作为该结构，第一电阻器连接在功率MOS FET的输入端子和栅极之间，第二电阻器，温度感测元件和第三电阻器在输入端子和接地点之间依次连接， 用于钳位的FET并联连接到温度感测元件和第三电阻器的串联电路，用于电流调节的FET的串联电路和第四电阻器并联连接到用于钳位的MOS FET，串联电路 第五和第六电阻连接在输入端和接地点之间，第五和第六电阻的一个节点连接到用于电流调节的FET的栅极，用于开关的FET连接在功率MOS FET的栅极和 接地点和温度感测元件的节点和第三电阻器连接到用于切换的FET的栅极。

    Semiconductor device provided with overheat protection circuit and electronic circuit using the same
    6.
    发明申请
    Semiconductor device provided with overheat protection circuit and electronic circuit using the same 有权
    具有过热保护电路的半导体装置及使用其的电子电路

    公开(公告)号：US20050068707A1

    公开(公告)日：2005-03-31

    申请号：US10948693

    申请日：2004-09-24

    申请人： Kouji Takada

    发明人： Kouji Takada

    IPC分类号： H01L27/04 ,  H01L21/336 ,  H01L21/66 ,  H01L23/34 ,  H03K17/08 ,  H03K17/082 ,  H02H5/04

    CPC分类号： H03K17/0822 ,  H01L2924/0002 ,  H03K2017/0806 ,  H01L2924/00

    摘要： A overheat protection circuit is formed on the same semiconductor substrate as a power MOS FET is formed on. As the configuration, a first resistor is connected between an input terminal and a gate of the power MOS FET, a second resistor, a temperature sensing element, and a third resistor are connected in this order between the input terminal and a ground point, an FET for clamp is connected in parallel to a series circuit of the temperature sensing element and the third resistor, a series circuit of an FET for current adjustment and a fourth resistor is connected in parallel to the MOS FET for clamp, a series circuit of a fifth and sixth resistors is connected between the input terminal and the ground point, a node of the fifth and sixth resistors is connected to a gate of the FET for current adjustment, an FET for switching is connected between the gate of the power MOS FET and the ground point, and a node of the temperature sensing element and the third resistor is connected to a gate of the FET for switching.

    摘要翻译： 在形成功率MOS FET的同一半导体衬底上形成过热保护电路。 作为该结构，第一电阻器连接在功率MOS FET的输入端子和栅极之间，第二电阻器，温度感测元件和第三电阻器在输入端子和接地点之间依次连接， 用于钳位的FET并联连接到温度感测元件和第三电阻器的串联电路，用于电流调节的FET的串联电路和第四电阻器并联连接到用于钳位的MOS FET，串联电路 第五和第六电阻连接在输入端和接地点之间，第五和第六电阻的一个节点连接到用于电流调节的FET的栅极，用于开关的FET连接在功率MOS FET的栅极和 接地点和温度感测元件的节点和第三电阻器连接到用于切换的FET的栅极。

    Semiconductor switch having a voltage detection function
    7.
    发明授权
    Semiconductor switch having a voltage detection function 有权

    公开(公告)号：US06545515B2

    公开(公告)日：2003-04-08

    申请号：US09904125

    申请日：2001-07-12

    申请人： Satoru Takahashi ,  Seiki Yamaguchi ,  Kouji Takada

    发明人： Satoru Takahashi ,  Seiki Yamaguchi ,  Kouji Takada

    IPC分类号： H03B100

    CPC分类号： H03K17/0822

    摘要： In a semiconductor switch, a voltage detection circuit is provided so as to be in parallel with a first switching element for turning on/off a power supply to a load, in which a voltage detection portion for detecting a drain voltage of the first switching element by dividing a voltage upon a resistance ratio or the like and a second switching element are connected in series to each other. The second switching element is turned on/off in accordance with ON/OFF of the first switching element. Accordingly, detection of a drain voltage is performed normally when the first switching element is in an ON state. When the first switching element is in an OFF state, a leakage current can be reduced by the second switching element.