公开(公告)号：US08818470B2

公开(公告)日：2014-08-26

申请号：US13597278

申请日：2012-08-29

申请人： Kuan-Jen Chung ,  Wen-Yi Tsai ,  Chia-Wei Su ,  Pei-Cheng Hu

发明人： Kuan-Jen Chung ,  Wen-Yi Tsai ,  Chia-Wei Su ,  Pei-Cheng Hu

IPC分类号： H04M1/00

CPC分类号： H01Q9/42 ,  H01Q1/245 ,  H04B1/3838

摘要： A mobile communication device including a system ground plane, an antenna, a signal distributor, a transceiver and a sensing controller is provided. The antenna converts an electromagnetic wave to a radio-frequency signal. Besides, the antenna and the system ground plane form a sensing capacitor to detect an object and generate a detecting signal accordingly. The signal distributor is electrically connected to the antenna through a first connection terminal and a second connection terminal and guides the radio-frequency signal and the detecting signal from the antenna to a third connection terminal and a fourth connection terminal. The transceiver is electrically connected to the third connection terminal and processes the radio-frequency signal. The sensing controller is electrically connected to the fourth connection terminal and determines whether the object exists around the antenna according to the sensing signal.

摘要翻译： 提供了包括系统接地层，天线，信号分配器，收发器和感测控制器的移动通信设备。 天线将电磁波转换成射频信号。 此外，天线和系统接地平面形成感测电容器以检测物体并相应地产生检测信号。 信号分配器通过第一连接端子和第二连接端子电连接到天线，并将射频信号和来自天线的检测信号引导到第三连接端子和第四连接端子。 收发器电连接到第三连接端子并处理射频信号。 感测控制器电连接到第四连接端子，并根据感测信号确定物体是否存在于天线周围。

公开(公告)号：US20130335258A1

公开(公告)日：2013-12-19

申请号：US13597278

申请日：2012-08-29

申请人： Kuan-Jen Chung ,  Wen-Yi Tsai ,  Chia-Wei Su ,  Pei-Cheng Hu

发明人： Kuan-Jen Chung ,  Wen-Yi Tsai ,  Chia-Wei Su ,  Pei-Cheng Hu

IPC分类号： G01S13/04

CPC分类号： H01Q9/42 ,  H01Q1/245 ,  H04B1/3838

摘要： A mobile communication device including a system ground plane, an antenna, a signal distributor, a transceiver and a sensing controller is provided. The antenna converts an electromagnetic wave to a radio-frequency signal. Besides, the antenna and the system ground plane form a sensing capacitor to detect an object and generate a detecting signal accordingly. The signal distributor is electrically connected to the antenna through a first connection terminal and a second connection terminal and guides the radio-frequency signal and the detecting signal from the antenna to a third connection terminal and a fourth connection terminal. The transceiver is electrically connected to the third connection terminal and processes the radio-frequency signal. The sensing controller is electrically connected to the fourth connection terminal and determines whether the object exists around the antenna according to the sensing signal.

摘要翻译： 提供了包括系统接地层，天线，信号分配器，收发器和感测控制器的移动通信设备。 天线将电磁波转换成射频信号。 此外，天线和系统接地平面形成感测电容器以检测物体并相应地产生检测信号。 信号分配器通过第一连接端子和第二连接端子电连接到天线，并将射频信号和来自天线的检测信号引导到第三连接端子和第四连接端子。 收发器电连接到第三连接端子并处理射频信号。 感测控制器电连接到第四连接端子，并根据感测信号确定物体是否存在于天线周围。

公开(公告)号：US20130135167A1

公开(公告)日：2013-05-30

申请号：US13364294

申请日：2012-02-01

申请人： Wen-Yi Tsai ,  Kuan-Jen Chung ,  Chia-Wei Su

发明人： Wen-Yi Tsai ,  Kuan-Jen Chung ,  Chia-Wei Su

IPC分类号： H01Q19/02

CPC分类号： H01Q1/243 ,  H01Q1/38 ,  H01Q5/364 ,  H01Q5/378 ,  H01Q9/0421

摘要： An antenna module includes a substrate, a main radiation structure, a strip-shaped radiation structure, a grounding structure, a shorting structure, a parasitic radiation structure and a metal radiation member. An acute angle is included between a first edge of the main radiation structure and a longitudinal edge of the substrate. The main radiation structure has a signal feeding portion and a connecting portion. The strip-shaped radiation structure is extended from a second edge of the main radiation structure. The shorting structure is U-shaped. A first end of the shorting structure is connected to the signal feeding portion and a second end of the shorting structure is connected to the grounding structure. The parasitic radiation structure is extended from the grounding structure and parallel to the first edge. A constant distance is between the parasitic radiation structure and the first edge. The metal radiation member is connected to the connecting portion.

摘要翻译： 天线模块包括基板，主辐射结构，条形辐射结构，接地结构，短路结构，寄生辐射结构和金属辐射构件。 在主辐射结构的第一边缘和基板的纵向边缘之间包括锐角。 主辐射结构具有信号馈送部分和连接部分。 条状辐射结构从主辐射结构的第二边缘延伸。 短路结构为U形。 短路结构的第一端连接到信号馈送部分，短路结构的第二端连接到接地结构。 寄生辐射结构从接地结构延伸并平行于第一边缘。 在寄生辐射结构和第一边缘之间具有恒定的距离。 金属辐射构件连接到连接部分。

公开(公告)号：US08654026B2

公开(公告)日：2014-02-18

申请号：US13364294

申请日：2012-02-01

申请人： Wen-Yi Tsai ,  Kuan-Jen Chung ,  Chia-Wei Su

发明人： Wen-Yi Tsai ,  Kuan-Jen Chung ,  Chia-Wei Su

IPC分类号： H01Q19/00 ,  H01Q1/38

CPC分类号： H01Q1/243 ,  H01Q1/38 ,  H01Q5/364 ,  H01Q5/378 ,  H01Q9/0421

摘要： An antenna module includes a substrate, a main radiation structure, a strip-shaped radiation structure, a grounding structure, a shorting structure, a parasitic radiation structure and a metal radiation member. An acute angle is included between a first edge of the main radiation structure and a longitudinal edge of the substrate. The main radiation structure has a signal feeding portion and a connecting portion. The strip-shaped radiation structure is extended from a second edge of the main radiation structure. The shorting structure is U-shaped. A first end of the shorting structure is connected to the signal feeding portion and a second end of the shorting structure is connected to the grounding structure. The parasitic radiation structure is extended from the grounding structure and parallel to the first edge. A constant distance is between the parasitic radiation structure and the first edge. The metal radiation member is connected to the connecting portion.

摘要翻译： 天线模块包括基板，主辐射结构，条形辐射结构，接地结构，短路结构，寄生辐射结构和金属辐射构件。 在主辐射结构的第一边缘和基板的纵向边缘之间包括锐角。 主辐射结构具有信号馈送部分和连接部分。 条状辐射结构从主辐射结构的第二边缘延伸。 短路结构为U形。 短路结构的第一端连接到信号馈送部分，短路结构的第二端连接到接地结构。 寄生辐射结构从接地结构延伸并平行于第一边缘。 在寄生辐射结构和第一边缘之间具有恒定的距离。 金属辐射构件连接到连接部分。

公开(公告)号：US08866550B2

公开(公告)日：2014-10-21

申请号：US13339373

申请日：2011-12-29

申请人： Chia-Wei Su ,  Ju-Lin Huang ,  Keko-Chun Liang

发明人： Chia-Wei Su ,  Ju-Lin Huang ,  Keko-Chun Liang

IPC分类号： H03F3/45

CPC分类号： H03F3/211 ,  H03F1/52 ,  H03F1/523 ,  H03F3/265 ,  H03F3/303 ,  H03F3/45 ,  H03F3/45071 ,  H03F3/45475 ,  H03F2200/444 ,  H03F2203/21178 ,  H03F2203/45218

摘要： An amplifier circuit with overshoot suppress scheme including an input amplifier, an output amplifier, and a diode is provided. A first and a second input ends of the output amplifier are coupled to a differential output pair of the input amplifier. The diode is coupled between an output end and the first input end of the output amplifier. When the voltage difference between the output and the input ends of the output amplifier is greater then the barrier voltage of the diode, the diode is turned on, so that the output end of the output amplifier is coupled to the input end of the output amplifier. In the transient state, it rapidly smoothes the overshoot signal. In the steady state, the diode is cut off to maintain the normal operation of the operational amplifier.

摘要翻译： 提供了具有输入放大器，输出放大器和二极管的具有过冲抑制方案的放大器电路。 输出放大器的第一和第二输入端耦合到输入放大器的差分输出对。 二极管耦合在输出端和输出放大器的第一输入端之间。 当输出放大器的输出端和输入端之间的电压差大于二极管的势垒电压时，二极管导通，使得输出放大器的输出端耦合到输出放大器的输入端 。 在瞬态状态下，它会快速平滑过冲信号。 在稳定状态下，二极管被切断以保持运算放大器的正常工作。

公开(公告)号：US08116149B2

公开(公告)日：2012-02-14

申请号：US12687571

申请日：2010-01-14

申请人： Yi-Tzu Chen ,  Chia-Wei Su ,  Ming-Zhang Kuo ,  Chung-Cheng Chou

发明人： Yi-Tzu Chen ,  Chia-Wei Su ,  Ming-Zhang Kuo ,  Chung-Cheng Chou

IPC分类号： G11C7/06

CPC分类号： G11C8/12 ,  G11C11/413

摘要： Circuits and methods for transmitting and receiving small swing differential voltage data to and from a memory are described. A plurality of memory cells is formed in arrays within a plurality of memory banks. Each memory bank is coupled to a pair of small swing differential voltage global bit lines that extend across the memory. A small signal write driver circuit is coupled to the global bit lines and configured to output a small signal differential voltage on the global bit lines during write cycles. A global sense amplifier is coupled to the global bit line pairs and configured to output a full swing voltage on a data line during a read cycle. Methods for providing small swing global bit line signals to memory cells are disclosed. The use of small swing differential voltage signals across the memory reduces power consumption and shortens memory cycle time.

摘要翻译： 描述用于向存储器发送和接收小的摆动差分电压数据的电路和方法。 多个存储单元形成为多个存储体中的阵列。 每个存储体耦合到跨越存储器延伸的一对小的摆动差分电压全局位线。 小信号写驱动器电路耦合到全局位线并且被配置为在写周期期间在全局位线上输出小信号差分电压。 全局读出放大器耦合到全局位线对并被配置为在读取周期期间在数据线上输出全摆幅电压。 公开了向存储器单元提供小的摆动全局位线信号的方法。 在存储器内使用小的摆幅差分电压信号可以降低功耗并缩短存储周期时间。

公开(公告)号：US08111103B2

公开(公告)日：2012-02-07

申请号：US12687892

申请日：2010-01-15

申请人： Chia-Wei Su ,  Ju-Lin Huang ,  Keko-Chun Liang

发明人： Chia-Wei Su ,  Ju-Lin Huang ,  Keko-Chun Liang

IPC分类号： H03F3/45

CPC分类号： H03F3/211 ,  H03F1/52 ,  H03F1/523 ,  H03F3/265 ,  H03F3/303 ,  H03F3/45 ,  H03F3/45071 ,  H03F3/45475 ,  H03F2200/444 ,  H03F2203/21178 ,  H03F2203/45218

摘要： An amplifier circuit with overshoot suppress scheme including an input amplifier, an output amplifier, and a diode is provided. A first and a second input ends of the output amplifier are coupled to a differential output pair of the input amplifier. A first end of the diode is coupled to an output end of the output amplifier. A second end of the diode is coupled to the first input end of the output amplifier. When the voltage difference between the output and the input ends of the output amplifier is greater then the barrier voltage of the diode, the diode is turned on, so that the output end of the output amplifier is coupled to the input end of the output amplifier. In the transient state, it rapidly smoothes the overshoot signal. In the steady state, the diode is cut off to maintain the normal operation of the operational amplifier.

摘要翻译： 提供了具有输入放大器，输出放大器和二极管的具有过冲抑制方案的放大器电路。 输出放大器的第一和第二输入端耦合到输入放大器的差分输出对。 二极管的第一端耦合到输出放大器的输出端。 二极管的第二端耦合到输出放大器的第一输入端。 当输出放大器的输出端和输入端之间的电压差大于二极管的势垒电压时，二极管导通，使得输出放大器的输出端耦合到输出放大器的输入端 。 在瞬态状态下，它会快速平滑过冲信号。 在稳定状态下，二极管被切断以保持运算放大器的正常工作。

公开(公告)号：US08798076B2

公开(公告)日：2014-08-05

申请号：US13555194

申请日：2012-07-23

申请人： Chia-Wei Su ,  Chu-Ya Hsiao

发明人： Chia-Wei Su ,  Chu-Ya Hsiao

IPC分类号： H04L12/28

CPC分类号： H04L25/4908 ,  H04L25/0272 ,  H04L45/74

摘要： A method of transporting data with embedded clock including following steps is provided. In an initial stage, a first bit length and a second bit length are determined. Original data is received. The original data is packed with every N bits as a packet, where N is at least 4. It is analyzed whether a long-run length of long-run data with consecutive same bit data in the packet is greater than N/2. The packet is coded to embed clock/toggle information with the first bit length into the packet. The clock/toggle information determines whether the long-run data is toggled. An appearance frequency of the clock/toggle information is clock information. If the long-run length is not greater than N/2, the long-run data is not toggled. If the long-run length is greater than N/2, bit with the second bit length after an Lth bit of the long-run data is toggled.

摘要翻译： 提供了一种使用嵌入式时钟传输数据的方法，包括以下步骤。 在初始阶段，确定第一位长度和第二位长度。 收到原始数据。 原始数据以每N位作为数据包打包，其中N至少为4.分析长度为长的数据包中连续相同位数据的长期数据是否大于N / 2。 该分组被编码以将具有第一比特长度的时钟/切换信息嵌入到分组中。 时钟/切换信息确定长时间数据是否切换。 时钟/切换信息的出现频率是时钟信息。 如果长期长度不大于N / 2，长期数据不会切换。 如果长期长度大于N / 2，则在长期数据的第L位之后的第二位长度的位被切换。

公开(公告)号：US20110181353A1

公开(公告)日：2011-07-28

申请号：US12797338

申请日：2010-06-09

申请人： Ju-Lin HUANG ,  Chia-Wei Su ,  Po-Yu Tseng

发明人： Ju-Lin HUANG ,  Chia-Wei Su ,  Po-Yu Tseng

IPC分类号： H03F3/68

CPC分类号： H03F1/0211 ,  H03F3/68 ,  H03F2203/45352 ,  H03F2203/45366 ,  H03F2203/45394 ,  H03F2203/45562 ,  H03F2203/45616 ,  H03F2203/45644 ,  H03F2203/45726

摘要： A two-channel operational amplifier circuit includes a first operational amplifier and a second operational amplifier. In a first frame period, the two-channel operational amplifier circuit switches a first input stage, a first gain stage and a first output stage to work between a working voltage and a half working voltage, and switches a second input stage, a second gain stage and a second output stage to work between the half working voltage and a ground voltage. In a second frame period, the two-channel operational amplifier circuit switches the second input stage and the second gain stage to work between the working voltage and the half working voltage, and switches the first input stage and the first gain stage to work between the half working voltage and the ground voltage.

摘要翻译： 双通道运算放大器电路包括第一运算放大器和第二运算放大器。 在第一帧周期中，双通道运算放大器电路切换第一输入级，第一增益级和第一输出级，以在工作电压和半工作电压之间工作，并切换第二输入级，第二增益 级和第二输出级在半工作电压和接地电压之间工作。 在第二帧周期中，双通道运算放大器电路将第二输入级和第二增益级切换到工作电压和半工作电压之间，并将第一输入级和第一增益级切换到工作电压 半工作电压和接地电压。

公开(公告)号：US20130136121A1

公开(公告)日：2013-05-30

申请号：US13555194

申请日：2012-07-23

申请人： Chia-Wei Su ,  Chu-Ya Hsiao

发明人： Chia-Wei Su ,  Chu-Ya Hsiao

IPC分类号： H04L12/56

CPC分类号： H04L25/4908 ,  H04L25/0272 ,  H04L45/74

摘要： A method of transporting data with embedded clock including following steps is provided. In an initial stage, a first bit length and a second bit length are determined. Original data is received. The original data is packed with every N bits as a packet, where N is at least 4. It is analyzed whether a long-run length of long-run data with consecutive same bit data in the packet is greater than N/2. The packet is coded to embed clock/toggle information with the first bit length into the packet. The clock/toggle information determines whether the long-run data is toggled. An appearance frequency of the clock/toggle information is clock information. If the long-run length is not greater than N/2, the long-run data is not toggled. If the long-run length is greater than N/2, bit with the second bit length after an Lth bit of the long-run data is toggled.

摘要翻译： 提供了一种使用嵌入式时钟传输数据的方法，包括以下步骤。 在初始阶段，确定第一位长度和第二位长度。 收到原始数据。 原始数据以每N位作为数据包打包，其中N至少为4.分析长度为长的数据包中连续相同位数据的长期数据是否大于N / 2。 该分组被编码以将具有第一比特长度的时钟/切换信息嵌入到分组中。 时钟/切换信息确定长时间数据是否切换。 时钟/切换信息的出现频率是时钟信息。 如果长期长度不大于N / 2，长期数据不会切换。 如果长期长度大于N / 2，则在长期数据的第L位之后的第二位长度的位被切换。