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1.发明申请SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM INCLUDING SEMICONDUCTOR MEMORY DEVICE 有权包含半导体存储器件的半导体存储器件和存储器系统公开(公告)号：US20080068897A1
公开(公告)日：2008-03-20
申请号：US11850128
申请日：2007-09-05
Applicant: Kwang-jin LEE , Woo-yeong CHO , Hye-jin KIM
Inventor： Kwang-jin LEE , Woo-yeong CHO , Hye-jin KIM
IPC: G11C7/10
CPC classification number: G11C7/1045 , G11C7/1078 , G11C7/1084 , G11C7/109 , G11C7/22
Abstract: A semiconductor memory device comprises a memory cell array comprising memory cells of a first type. The memory cell array performs write and read operations in response to signals designed for the operation of a memory cell array comprising memory cells of a type other than the first type.
Abstract translation: 半导体存储器件包括包括第一类型存储单元的存储单元阵列。 存储单元阵列响应于设计用于包括除了第一类型之外的类型的存储器单元的存储单元阵列的操作的信号执行写入和读取操作。
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公开(公告)号：US20080106930A1
公开(公告)日：2008-05-08
申请号：US11933536
申请日：2007-11-01
Applicant: Hye-jin KIM , Kwang-jin LEE , Du-eung KIM , Woo-yeong CHO , Chang-han CHOI , Ki-won LIM
Inventor： Hye-jin KIM , Kwang-jin LEE , Du-eung KIM , Woo-yeong CHO , Chang-han CHOI , Ki-won LIM
CPC classification number: G11C8/06 , G11C8/10 , G11C13/0004 , G11C13/0064 , G11C13/0069 , G11C29/12005 , G11C29/50 , G11C2013/0083 , G11C2013/0092
Abstract: A PRAM includes a memory cell array of phase change memory cells, and a write circuit receiving an externally provided first voltage and supplying a write pulse for writing data to the memory cells in a normal operation mode. The write circuit also receives an externally provided second voltage higher than the first voltage and supplies a firing pulse to at least one firing-failed phase change memory cell.
Abstract translation: PRAM包括相变存储单元的存储单元阵列和接收外部提供的第一电压的写入电路，并且在正常操作模式中提供用于将数据写入存储单元的写入脉冲。 写入电路还接收高于第一电压的外部提供的第二电压，并且向至少一个点火故障相变存储单元提供点火脉冲。
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公开(公告)号：US20080055963A1
公开(公告)日：2008-03-06
申请号：US11844512
申请日：2007-08-24
Applicant: Kwang-jin LEE , Woo-yeong CHO
Inventor： Kwang-jin LEE , Woo-yeong CHO
IPC: G11C11/00
CPC classification number: G11C13/0064 , G11C11/5678 , G11C13/0004 , G11C13/0069 , G11C2013/0078
Abstract: In a phase change random access memory (PRAM) device, data is programmed in selected memory cells using a plurality of program loops. In each program loop, division program operations for cell groups including the selected memory cells are performed in consecutive timeslots.
Abstract translation: 在相变随机存取存储器（PRAM）装置中，使用多个程序循环将数据编程在所选存储单元中。 在每个程序循环中，在连续的时隙中执行包括所选存储单元的单元组的分割程序操作。
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4.发明申请公开(公告)号：US20070100073A1
公开(公告)日：2007-05-03
申请号：US11549214
申请日：2006-10-13
Applicant: Kwang-jin LEE , Jeong-heon AHN , Hye-kyong LEE , Boo-ho SEO , Ji-min LEE
Inventor： Kwang-jin LEE , Jeong-heon AHN , Hye-kyong LEE , Boo-ho SEO , Ji-min LEE
CPC classification number: C08F265/04 , C08F257/02 , C08F265/06 , C08F283/00 , C08F283/12 , C08F285/00 , C08G77/442 , C08L51/04 , C08L51/08 , Y10S525/902 , Y10S525/903 , C08L2666/04 , C08L2666/02
Abstract: The present invention relates to an acryl-silicon rubber complex polymer and a method for the preparation and use of the same. More precisely, the present invention relates to an acryl-silicon rubber complex polymer which has a seed-core-shell structure wherein the vinyl monomer and hydrophilic monomer are cross-linked on the seed; the acryl-silicon complex IPN core having an IPN (interpenetrating network) structure in which silicon rubber particles are dispersed by being cross-linked to acryl rubber, in a continuous phase, is formed on the seed; and a shell prepared by graft-polymerization of C1˜C4 alkyl methacrylate to the acryl-silicon complex IPN core is formed on the core, and a method of preparation and use of the same. The acryl-silicon rubber complex polymer of the present invention has excellent impact resistance, weatherability and gloss, so that it can be effectively used as an impact modifier for vinyl chloride resin. The acryl-silicon complex IPN core has an IPN (interpenetrating network) structure formed by radical polymerization of acryl monomer and hydrosilyation of silicon rubber.
Abstract translation: 本发明涉及丙烯酸硅橡胶复合聚合物及其制备和使用方法。 更准确地说，本发明涉及一种具有种核 - 壳结构的丙烯酰硅橡胶复合聚合物，其中乙烯基单体和亲水单体在种子上交联; 在种子上形成具有IPN（互穿网络）结构的丙烯酸 - 硅复合物IPN芯，其中硅橡胶颗粒通过与丙烯酸橡胶交联而分散在其中; 并且在芯上形成通过将C1-C4烷基甲基丙烯酸酯接枝到丙烯酸 - 硅复合物IPN芯上而制备的壳及其制备和使用方法。 本发明的丙烯酸 - 硅橡胶复合聚合物具有优异的耐冲击性，耐候性和光泽，因此可有效地用作氯乙烯树脂的抗冲击改性剂。 丙烯酸 - 硅复合物IPN芯具有通过丙烯酸单体的自由基聚合和硅橡胶的氢化作用形成的IPN（互穿网络）结构。
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5.发明申请公开(公告)号：US20080055971A1
公开(公告)日：2008-03-06
申请号：US11834845
申请日：2007-08-07
Applicant: Hye-jin KIM , Kwang-jin LEE , Du-eung KIM
Inventor： Hye-jin KIM , Kwang-jin LEE , Du-eung KIM
IPC: G11C11/00
CPC classification number: G11C13/0064 , G11C11/5678 , G11C13/0004 , G11C13/0069 , G11C2013/0092
Abstract: A method of operating a phase change random access memory (PRAM) device comprises performing a program operation to store data in selected PRAM cells of the device, wherein the program operation comprises a plurality of sequential program loops. The method further comprises suspending the program operation in the middle of the program operation, and after suspending the program operation, resuming the program operation in response to a resume command.
Abstract translation: 一种操作相变随机存取存储器（PRAM）装置的方法包括执行程序操作以将数据存储在所述装置的所选择的PRAM单元中，其中所述程序操作包括多个顺序程序循环。 该方法还包括在编程操作的中间暂停编程操作，并且在暂停编程操作之后，响应于恢复命令恢复程序操作。
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Patent Agency Ranking
6.发明申请公开(公告)号：US20130039124A1
公开(公告)日：2013-02-14
申请号：US13655666
申请日：2012-10-19
Applicant: Hye-jin KIM , Kwang-jin LEE , Du-eung KIM
Inventor： Hye-jin KIM , Kwang-jin LEE , Du-eung KIM
IPC: G11C11/00
CPC classification number: G11C13/0064 , G11C11/5678 , G11C13/0004 , G11C13/0069 , G11C2013/0092
Abstract: A method of operating a phase change random access memory (PRAM) device includes performing a program operation to store data in selected PRAM cells of the device, wherein the program operation comprises a plurality of sequential program loops. The method further comprises suspending the program operation in the middle of the program operation, and after suspending the program operation, resuming the program operation in response to a resume command.
Abstract translation: 操作相变随机存取存储器（PRAM）装置的方法包括执行程序操作以将数据存储在所述装置的所选PRAM单元中，其中所述程序操作包括多个顺序程序循环。 该方法还包括在编程操作的中间暂停编程操作，并且在暂停编程操作之后，响应于恢复命令恢复程序操作。
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7.发明申请公开(公告)号：US20100220521A1
公开(公告)日：2010-09-02
申请号：US12724679
申请日：2010-03-16
Applicant: Hye-jin KIM , Kwang-jin LEE , Du-eung KIM
Inventor： Hye-jin KIM , Kwang-jin LEE , Du-eung KIM
CPC classification number: G11C13/0064 , G11C11/5678 , G11C13/0004 , G11C13/0069 , G11C2013/0092
Abstract: A method of operating a phase change random access memory (PRAM) device comprises performing a program operation to store data in selected PRAM cells of the device, wherein the program operation comprises a plurality of sequential program loops. The method further comprises suspending the program operation in the middle of the program operation, and after suspending the program operation, resuming the program operation in response to a resume command.
Abstract translation: 一种操作相变随机存取存储器（PRAM）装置的方法包括执行程序操作以将数据存储在所述装置的所选择的PRAM单元中，其中所述程序操作包括多个顺序程序循环。 该方法还包括在编程操作的中间暂停编程操作，并且在暂停编程操作之后，响应于恢复命令恢复程序操作。
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8.发明申请公开(公告)号：US20110213922A1
公开(公告)日：2011-09-01
申请号：US13108143
申请日：2011-05-16
Applicant: Hye-jin KIM , Kwang-jin LEE , Du-eung KIM
Inventor： Hye-jin KIM , Kwang-jin LEE , Du-eung KIM
IPC: G06F12/02
CPC classification number: G11C13/0064 , G11C11/5678 , G11C13/0004 , G11C13/0069 , G11C2013/0092
Abstract: A method of operating a phase change random access memory (PRAM) device includes performing a program operation to store data in selected PRAM cells of the device, wherein the program operation comprises a plurality of sequential program loops. The method further comprises suspending the program operation in the middle of the program operation, and after suspending the program operation, resuming the program operation in response to a resume command.
Abstract translation: 操作相变随机存取存储器（PRAM）装置的方法包括执行程序操作以将数据存储在所述装置的所选PRAM单元中，其中所述程序操作包括多个顺序程序循环。 该方法还包括在编程操作的中间暂停编程操作，并且在暂停编程操作之后，响应于恢复命令恢复程序操作。
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公开(公告)号：US20100165729A1
公开(公告)日：2010-07-01
申请号：US12720918
申请日：2010-03-10
Applicant: Kwang-jin LEE , Choong-keun KWAK , Du-eung KIM
Inventor： Kwang-jin LEE , Choong-keun KWAK , Du-eung KIM
CPC classification number: G11C13/0069 , G11C13/0004 , G11C13/0064
Abstract: In a nonvolatile memory device, a program operation is performed on a plurality of nonvolatile memory cells by programming data having a first logic state in a first group among a plurality of selected memory cells selected from the plurality of nonvolatile memory cells during a first program interval of the program operation, and thereafter, programming data having a second logic state different from the first logic state in a second group among the selected memory cells during a second program interval of the program operation after the first program interval.
Abstract translation: 在非易失性存储器件中，通过在第一程序间隔期间从多个非易失性存储单元中选出的多个选择的存储单元中的第一组中编程具有第一逻辑状态的数据，对多个非易失性存储单元执行编程操作 并且此后，在所述第一编程间隔之后的所述程序操作的第二编程间隔期间，在所选择的存储单元之间具有与所述第二组中的第一逻辑状态不同的第二逻辑状态的编程数据。
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公开(公告)号：US20080056023A1
公开(公告)日：2008-03-06
申请号：US11834843
申请日：2007-08-07
Applicant: Kwang-jin LEE , Choong-keun KWAK , Du-eung KIM
Inventor： Kwang-jin LEE , Choong-keun KWAK , Du-eung KIM
IPC: G11C7/00
CPC classification number: G11C13/0069 , G11C13/0004 , G11C13/0064
Abstract: In a nonvolatile memory device, a program operation is performed on a plurality of nonvolatile memory cells by programming data having a first logic state in a first group among a plurality of selected memory cells selected from the plurality of nonvolatile memory cells during a first program interval of the program operation, and thereafter, programming data having a second logic state different from the first logic state in a second group among the selected memory cells during a second program interval of the program operation after the first program interval.
Abstract translation: 在非易失性存储器件中，通过在第一程序间隔期间从多个非易失性存储单元中选出的多个选择的存储单元中的第一组中编程具有第一逻辑状态的数据，对多个非易失性存储单元执行编程操作 并且此后，在所述第一编程间隔之后的所述程序操作的第二编程间隔期间，在所选择的存储单元之间具有与所述第二组中的第一逻辑状态不同的第二逻辑状态的编程数据。
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