公开(公告)号：US20050276278A1

公开(公告)日：2005-12-15

申请号：US10528188

申请日：2003-09-18

申请人： Kwangmo Jung ,  Chan-Soo Yoon ,  Seiung-Uk Lim ,  Young-Choong Park ,  Kwang-Soon Choi ,  Kyeung-Hak Seo

发明人： Kwangmo Jung ,  Chan-Soo Yoon ,  Seiung-Uk Lim ,  Young-Choong Park ,  Kwang-Soon Choi ,  Kyeung-Hak Seo

IPC分类号： H04L12/66 ,  H04L12/28 ,  H04L12/46 ,  H04L29/06 ,  H04M3/00 ,  H04M11/00 ,  H04J3/22

CPC分类号： H04L69/08 ,  H04L69/18

摘要： The present invention relates to a communication system architecture which can perform integrated processing of different network protocols and multimedia traffics. The communication system for integrated processing of different network protocols and multimedia traffics comprises a common packet; a common packet switch; a plurality of channels; a common bus; a common protocol platform; an external network protocol converter; and an internal network protocol converter. Thus, the present invention can process traffics rapidly embodied by mean of hardware, and easily perform various QoS, traffic control, and so on by designing a unified common platform with an open architecture. In addition, the present invention can be used for digital consumer devices in building networks and home networks or various digital appliances classified as Internet information appliances, and for control systems such as a home gateway, a home server, an STB, a home station and so on.

摘要翻译： 本发明涉及可以执行不同网络协议和多媒体业务的集成处理的通信系统架构。 用于不同网络协议和多媒体业务的集成处理的通信系统包括一个公共分组; 一个公共分组交换机; 多个通道; 一辆公共汽车 一个通用协议平台; 外部网络协议转换器; 和内部网络协议转换器。 因此，本发明可以通过设计具有开放式架构的统一通用平台来处理由硬件意图迅速体现的业务，并且容易地执行各种QoS，业务控制等。 此外，本发明可以用于建筑物网络和家庭网络中的数字消费设备或分类为互联网信息设备的各种数字设备，以及用于诸如家庭网关，家庭服务器，STB，家庭站和家庭网络的控制系统 所以。

公开(公告)号：US07882254B2

公开(公告)日：2011-02-01

申请号：US10536189

申请日：2003-11-25

申请人： Kwang-Soon Choi ,  Seung-Ok Lim ,  Kwangmo Jung ,  Kyeung-Hak Seo

发明人： Kwang-Soon Choi ,  Seung-Ok Lim ,  Kwangmo Jung ,  Kyeung-Hak Seo

IPC分类号： G06F15/16

CPC分类号： H04L69/08

摘要： The present invention provides common protocol architecture and methods for transmitting data between different network protocols and a common protocol packet. The common protocol architecture comprises an application layer; a common protocol layer positioned under the application layer, the common protocol layer enabling data communications between the different protocols; a presentation layer positioned under the common protocol layer; a session layer positioned under the presentation layer; a transport layer positioned under the session layer; a network layer positioned under the transport layer; a data link layer positioned under the network layer; and a physical layer positioned under the data link layer. The common protocol packet comprises a common protocol header with information about a packet and a payload with the contents of data. By designing the common protocol layer and the common protocol packet accepting various protocols simultaneously, the present invention can improve compatibility between different protocols.

摘要翻译： 本发明提供了用于在不同网络协议和公共协议分组之间传输数据的通用协议架构和方法。 公共协议架构包括应用层; 位于应用层之下的公共协议层，公共协议层使不同协议之间能够进行数据通信; 位于公共协议层下的表示层; 位于表示层下的会话层; 位于会话层下方的传输层; 位于传输层下面的网络层; 位于网络层下的数据链路层; 以及位于数据链路层下面的物理层。 公共协议分组包括具有关于分组的信息的公共协议报头和具有数据内容的有效载荷。 通过设计公共协议层和同时接受各种协议的公共协议包，本发明可以提高不同协议之间的兼容性。

公开(公告)号：US20060053229A1

公开(公告)日：2006-03-09

申请号：US10536189

申请日：2003-11-25

申请人： Kwang-Soon Choi ,  Seung-Ok Lim ,  Kwangmo Jung ,  Kyeung-Hak Seo

发明人： Kwang-Soon Choi ,  Seung-Ok Lim ,  Kwangmo Jung ,  Kyeung-Hak Seo

IPC分类号： G06F15/16

CPC分类号： H04L69/08

摘要： The present invention provides common protocol architecture and methods for transmitting data between different network protocols and a common protocol packet. The common protocol architecture comprises an application layer; a common protocol layer positioned under the application layer, the common protocol layer enabling data communications between the different protocols; a presentation layer positioned under the common protocol layer; a session layer positioned under the presentation layer; a transport layer positioned under the session layer; a network layer positioned under the transport layer; a data link layer positioned under the network layer; and a physical layer positioned under the data link layer. The common protocol packet comprises a common protocol header with information about a packet and a payload with the contents of data. By designing the common protocol layer and the common protocol packet accepting various. protocols simultaneously, the present invention can improve compatibility between different protocols.

摘要翻译： 本发明提供了用于在不同网络协议和公共协议分组之间传输数据的通用协议架构和方法。 公共协议架构包括应用层; 位于应用层之下的公共协议层，公共协议层使不同协议之间能够进行数据通信; 位于公共协议层下的表示层; 位于表示层下的会话层; 位于会话层下方的传输层; 位于传输层下面的网络层; 位于网络层下的数据链路层; 以及位于数据链路层下面的物理层。 公共协议分组包括具有关于分组的信息的公共协议报头和具有数据内容的有效载荷。 通过设计公共协议层和接受各种公共协议报文。 同时，本发明可以提高不同协议之间的兼容性。

公开(公告)号：US6111615A

公开(公告)日：2000-08-29

申请号：US777128

申请日：1996-12-30

申请人： Hyun-Kyung Oh ,  Kyeung-Hak Seo

发明人： Hyun-Kyung Oh ,  Kyeung-Hak Seo

IPC分类号： G06F12/00 ,  G09G5/397 ,  G09G5/399 ,  H04N5/907 ,  H04N9/64

CPC分类号： H04N5/4448 ,  H04N5/907

摘要： An address generating and mapping device of a video capture system includes: a microprocessor having a counter counted by being synchronized with a horizontal synchronizing signal of a video signal, an address port for outputting an address to be used when reading from a memory, and a counter port for outputting the counter value and a bank selection signal by using predetermined higher bits among the counter output as the bank selection signal for selecting data banks of the memory; a counter for performing a predetermined operation according to a signal for selecting a mode, when a mode for generating an address necessary for storing the video signal is referred to as an address generating mode and a mode for mapping an address necessary for accessing the memory is referred to as an address mapping mode; multiplexers for outputting a counter value from the microprocessor to higher addresses of the memory when the mode selection signal is the address generating mode and outputting the addresses output from the microprocessor as higher addresses of the memory when the mode selection signal is the address mapping mode, and a bank selecting unit for outputting higher bits among the signals output from the counter built in the microprocessor as a signal for selecting the data banks of the memory when the mode selection signal is the address mapping mode. In the address generating mode, the counter counts the number corresponding to that of pixels constituting a horizontal line of the video signal to output as lower addresses of the memory and is cleared by a clear signal having the same frequency as that of the horizontal synchronizing signal of the video signal, and, in the address mapping mode, the counter connects address lines output from the microprocessor to lower address lines of the memory. The use of the mode selection signal can provide a simple address generating and mapping circuit for the video capture system.

公开(公告)号：US07280468B2

公开(公告)日：2007-10-09

申请号：US10649647

申请日：2003-08-28

申请人： Sung-Jin Kang ,  Jin-Woong Cho ,  Cheol-Hee Park ,  Min-Chul Ju ,  Dae-Ki Hong ,  Kyeung-Hak Seo ,  Myoung-Jin Kim

发明人： Sung-Jin Kang ,  Jin-Woong Cho ,  Cheol-Hee Park ,  Min-Chul Ju ,  Dae-Ki Hong ,  Kyeung-Hak Seo ,  Myoung-Jin Kim

IPC分类号： H04J11/00

CPC分类号： H04J13/004 ,  H04J13/0077 ,  H04L1/0041 ,  H04L1/0061

摘要： A constant amplitude coded bi-orthogonal demodulator demodulates the received constant amplitude bi-orthogonal modulated data, cancels the parity bits to generate the serial data, detects the occurrence of an error by dividing the demodulated data into a plurality of groups of data, outputs the serial data as demodulated data if an error does not occur, sequentially converts bit polarities of data of groups in which an error occurs if the error detector detects the error, compares distances between the received bi-orthogonal modulated data and the constant amplitude coded bi-orthogonal modulated data, and selects, as demodulated data, data of which corresponding bit polarities are changed according to the comparison results.According to the present invention, power consumption is reduced, a power amplifier can be manufactured at an inexpensive cost, interference robustness can be ensured, and data can be transmitted at a high transmission rate and a variable transmission rate.

摘要翻译： 一个恒定幅度编码的双正交解调器对接收到的恒幅双正交调制数据进行解调，取消奇偶校验位以产生串行数据，通过将解调数据分成多组数据来检测出错， 作为解调数据的串行数据如果不发生错误，则顺序地转换误差检测器检测到错误时发生错误的组的数据的位极性，比较接收到的双正交调制数据与恒幅编码的双向正交调制数据之间的距离， 正交调制数据，并根据比较结果选择相应位极性改变的数据作为解调数据。 根据本发明，能够降低能耗，能够以廉价的成本制造功率放大器，能够确保干扰稳定性，能够以高传输速度和可变传输速率传输数据。