POSITION DETERMINATION APPARATUS FOR ROBOT DETECTION LASER SENSOR SYSTEM IN FOUP MOVABLE BY OHT

    公开(公告)号:US20240282607A1

    公开(公告)日:2024-08-22

    申请号:US18200201

    申请日:2023-05-22

    CPC classification number: H01L21/67259 H01L21/67778 H01L21/681

    Abstract: The present invention relates to a position determination apparatus for a robot detection laser sensor system in front-opening unified pods (FOUPs), including: an external server; and a wafer processing device for performing processing for wafers and transmitting integration management data to the external server, wherein the wafer processing device may include: the FOUPs configured to accommodate the wafers therein; loadports to which the FOUPs are detachably coupled; processing chambers in which the processing for the wafers are performed; and an equipment front end module (EFEM) disposed between the processing chambers and the loadports and having an end-effector adapted to get the wafers out of the FOUPs into the processing chambers or put the wafers finished in processing in the processing chambers into the FOUPs.

    END EFFECTOR MEASURING MODULE AND END EFFECTOR MONITORING APPARATUS USING THE SAME

    公开(公告)号:US20210252717A1

    公开(公告)日:2021-08-19

    申请号:US17306859

    申请日:2021-05-03

    Applicant: Kyu Ok LEE

    Abstract: Provided are an end effect measuring module and an end effect monitoring apparatus using the same. The end effect measuring module is installed at through holes formed between an Equipment Front End Module (EFEM) equipped with an end effector and a semiconductor processing apparatus for processing a wafer and measuring the position according to the movement path of a target passing the through holes. The measurement target is the end effector, and a sensing unit measures whether or not the end effector is shifted and changed in direction. A light receiving unit of the sensing unit outputs an electrical signal that is higher or lower than a reference value in response to shifting of the end effector, or outputs an electrical signal increasing or decreasing along a time axis in response to a directional change of the end effector.

    VERTICALLY PINCHED JUNCTION FIELD EFFECT TRANSISTOR
    3.
    发明申请
    VERTICALLY PINCHED JUNCTION FIELD EFFECT TRANSISTOR 有权
    垂直连接的场效应晶体管

    公开(公告)号:US20130001656A1

    公开(公告)日:2013-01-03

    申请号:US13172036

    申请日:2011-06-29

    CPC classification number: H01L29/66901 H01L29/8086

    Abstract: A vertical junction field-effect transistor in a CMOS base-technology. The vertical junction field-effect transistor includes a semiconductor substrate having a source region and a drain region, a main-channel region formed between the source region and the drain region, a well region formed on the main-channel region between the source region and the drain region, vertical pinch-off regions formed at both source and drain ends or only on the source-end of the well region on the main-channel region in the source region and the drain region respectively, a source contact on the vertical pinch-off region in the source region, a drain contact on the vertical pinch-off region in the drain region, a gate contact on the well region between the source contact and the drain contact and shallow trench isolations formed on the well region.

    Abstract translation: CMOS基础技术中的垂直结型场效应晶体管。 垂直结场效应晶体管包括具有源极区和漏极区的半导体衬底,形成在源区和漏区之间的主沟道区,形成在源极区和源极区之间的主沟道区上的阱区, 在源极区域和漏极区域的主沟道区域上分别形成在源极和漏极端部处或仅在阱区域的源极端处的垂直夹断区域,垂直夹点处的源极接触 源极区域中的漏极区域,漏极区域中的垂直夹断区域上的漏极接触,源极接触和漏极接触之间的阱区域上的栅极接触以及在阱区域上形成的浅沟槽隔离。

    FOUP HAVING END EFFECTOR DETECTION SENSOR, AND INTEGRATED DATA MANAGEMENT SYSTEM USING SAME

    公开(公告)号:US20240429082A1

    公开(公告)日:2024-12-26

    申请号:US18703734

    申请日:2022-10-05

    Abstract: A FOUP comprises: an external server; and a substrate processing device for performing substrate processing and transmitting integrated management data to the external server. The substrate processing device comprises: FOUPs for accommodating a plurality of substrates; load ports to which the FOUPs are detachably coupled; a process chamber in which substrate processing is performed; an EFEM, which is provided between the process chamber and the load ports, and has an end effector for getting, into the process chamber, the substrates accommodated in the FOUPs or putting, into the FOUPs, the substrates for which processing is completed in the process chamber; and a control unit for transmitting, if the FOUPs are loaded in the load ports, moving path data of the end effector to the external server when the end effector enters into or retreats from the FOUPs.

    Bipolar Junction Transistor Based on CMOS Technology
    5.
    发明申请
    Bipolar Junction Transistor Based on CMOS Technology 审中-公开
    基于CMOS技术的双极结晶体管

    公开(公告)号:US20120032303A1

    公开(公告)日:2012-02-09

    申请号:US12916311

    申请日:2010-10-29

    Abstract: The present invention relates to semiconductor technologies, and more particularly to a bipolar junction transistor (BJT) in a CMOS base technology and methods of forming the same. The BJT includes a semiconductor substrate having an emitter region, a base having a first contact, and a collector having a second contact and a well plug; a first silicide film on the first contact; a second silicide film on the second contact; a first silicide blocking layer on or over the semiconductor substrate between the first and second silicide films, and a second silicide blocking layer on the semiconductor substrate between the first silicide film and the emitter region.

    Abstract translation: 本发明涉及半导体技术,更具体地涉及CMOS基底技术中的双极结型晶体管(BJT)及其形成方法。 BJT包括具有发射极区域的半导体衬底,具有第一触点的基底和具有第二触点和阱插塞的集电极; 第一接触处的第一硅化物膜; 第二接触层上的第二硅化物膜; 在第一和第二硅化物膜之间或之上半导体衬底上的第一硅化物阻挡层,以及在第一硅化物膜和发射极区之间的半导体衬底上的第二硅化物阻挡层。

Patent Agency Ranking