DRIVER INTEGRATED CIRCUIT AND DISPLAY DEVICE INCLUDING THE SAME

    公开(公告)号:US20180122305A1

    公开(公告)日:2018-05-03

    申请号:US15801046

    申请日:2017-11-01

    Abstract: A driver integrated circuit and a display device including the same are disclosed. The driver integrated circuit includes a data voltage generator that includes a digital-to-analog converter converting a digital signal into an analog signal, generates an analog data voltage in a display drive operation, and applies the analog data voltage to pixels of a display panel, a sensor that is connected to a sensing channel connected to the pixels of the display panel, shares the digital-to-analog converter with the data voltage generator, converts an analog sensing voltage indicating electrical characteristics of the pixels input from the sensing channel into digital sensing data in a sensing drive operation, and outputs the digital sensing data, and switching elements selectively operating in the display drive operation and the sensing drive operation.

    DRIVING CIRCUIT FOR REAL-TIME EXTERNAL COMPENSATION AND ELECTROLUMINESCENT DISPLAY INCLUDING THE SAME

    公开(公告)号:US20180130423A1

    公开(公告)日:2018-05-10

    申请号:US15803325

    申请日:2017-11-03

    Abstract: A driving circuit for real-time external compensation and an electroluminescent display including the same are disclosed. The driving circuit includes a timing controller generating a gate shift clock group, a gate start pulse, and first and second selection signals and a gate driver generating a gate signal based on the control of the timing controller and supplying the gate signal to a display panel. The gate driver includes a plurality of stages which shifts the gate start pulse in accordance with the gate shift clock group to generate an output signal and supplies the output signal to a first output node, a first output control switch connected between a second output node connected to a gate line of the display panel and the first output node, and a second output control switch connected between the second output node and an input terminal of a gate low voltage.

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