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    Chip on Film and Display Device Including the Same
    3.
    发明申请
    Chip on Film and Display Device Including the Same 审中-公开

    公开(公告)号：US20190189058A1

    公开(公告)日：2019-06-20

    申请号：US16213907

    申请日：2018-12-07

    申请人： LG Display Co., Ltd.

    发明人： Soon-Dong CHO ,  Jae-Won HAN ,  Jun-O HUR ,  Dong-Ju KIM

    IPC分类号： G09G3/3258 ,  G09G3/3291

    摘要： A chip on film and a display device including the same selectively outputs gate transmission signals and data outputs to reduce the number of output pads in a data driving IC. The COF includes first to third groups of data input pads, gate input pads, and output pads. A data driving IC includes first to third groups of output buffers, a first switchable output unit configured to selectively supply gate transmission signals and an output of the first group of output buffers to the first group of output pads, and a second switchable output unit configured to selectively supply the gate transmission signals and an output of the third group of output buffers to the third group of output pads. An output of the second group of output buffers is supplied to the second group of output pads between the first and the third groups of output pads.

    DISPLAY DEVICE
    5.
    发明申请
    DISPLAY DEVICE 审中-公开

    公开(公告)号：US20190197964A1

    公开(公告)日：2019-06-27

    申请号：US16225753

    申请日：2018-12-19

    申请人： LG Display Co., Ltd.

    发明人： Soon-Dong CHO ,  Jung-Jae KIM ,  Sang-Uk LEE ,  Hyung-Jin CHOE

    IPC分类号： G09G3/3275 ,  G09G3/36

    CPC分类号： G09G3/3275 ,  G09G3/3685 ,  G09G2310/0289 ,  G09G2310/0297 ,  G09G2310/08 ,  G09G2320/0673 ,  G09G2330/021

    摘要： A display device can include a gate driver configured to drive gate lines of a panel; a data driver configured to drive data lines of the panel; a timing controller configured to control operations of the gate driver and the data driver; and a level shifter integrated circuit (IC) configured to receive a plurality of control signals from the timing controller, and generate and output a plurality gate control signals for controlling driving of the gate driver, in which the plurality of control signals include an on clock and an off clock, and the level shifter IC stores the on clock and the off clock in buffers based on one or more control signals from the timing controller, generates a plurality of scan clocks by logically processing the on clock and the off clock, and outputs the plurality of scan clocks to the gate driver.

    TOUCH DISPLAY DEVICE
    6.
    发明申请
    TOUCH DISPLAY DEVICE 审中-公开

    公开(公告)号：US20190121476A1

    公开(公告)日：2019-04-25

    申请号：US16135596

    申请日：2018-09-19

    申请人： LG DISPLAY CO., LTD.

    发明人： Hoon JANG ,  Soon-Dong CHO ,  Won-Yong JANG

    IPC分类号： G06F3/041 ,  G06F3/044 ,  G06F3/047 ,  G09G3/20

    CPC分类号： G06F3/0412 ,  G06F3/0416 ,  G06F3/04166 ,  G06F3/0418 ,  G06F3/044 ,  G06F3/0446 ,  G06F3/047 ,  G09G3/20 ,  G09G2310/08 ,  G09G2330/021

    摘要： A touch display device can include a panel including touch electrodes; a touch/data driver to drive data lines and the touch electrodes of the panel, read out capacitance variations in the touch electrodes and output sensing data; a gate driver to drive gate lines of the panel; a timing controller to control display operations of the touch/data driver and the gate driver; a microcontroller unit (MCU) to control touch driving and sensing operations of the touch/data driver; a first power circuit to drive the timing controller and the gate driver using a main voltage supplied through a first power line; a multiplexer to output one of a universal serial bus (USB) voltage supplied through a second power line and the main voltage supplied through the first power line; a second power circuit configured to drive the touch/data driver, the gate driver and the MCU based on an output voltage from an output of the multiplexer; and a switch connected between the output of the multiplexer and the second power line, the switch being configured to switch the output of the multiplexer to the second power line.

    DISPLAY DEVICE WITH INTRA-INTERFACE FOR SIMPLE SIGNAL TRANSMITTAL PATH
    7.
    发明申请
    DISPLAY DEVICE WITH INTRA-INTERFACE FOR SIMPLE SIGNAL TRANSMITTAL PATH 有权

    公开(公告)号：US20230005435A1

    公开(公告)日：2023-01-05

    申请号：US17943779

    申请日：2022-09-13

    申请人： LG DISPLAY CO., LTD.

    发明人： Soon-Dong CHO ,  Jung-Jae KIM ,  Min-Gyu PARK ,  Jae-Won HAN ,  Dong-Won PARK

    IPC分类号： G09G3/3266 ,  G09G3/3275

    摘要： A display device includes a display panel including pixels, and data lines and gate lines connected to the pixels, a timing controller configured to output source driving bit information and gate driving bit information through an intra-interface signal, a source driver configured to generate data driving signal based on the source driving bit information and to supply the data driving signal to the data lines, and a gate driver configured to generate a gate driving signal based on the gate driving bit information and to supply the gate driving signal to the gate lines, wherein the intra-interface signal is configured with predetermined data transmission units and includes both the source driving bit information and the gate driving bit information every 1 data transmission unit.

    DISPLAY DEVICE INCLUDING INTRA-INTERFACE
    8.
    发明申请
    DISPLAY DEVICE INCLUDING INTRA-INTERFACE 有权

    公开(公告)号：US20210183319A1

    公开(公告)日：2021-06-17

    申请号：US17124116

    申请日：2020-12-16

    申请人： LG Display Co., Ltd.

    发明人： Soon-Dong CHO ,  Jung-Jae KIM ,  Min-Gyu PARK ,  Jae-Won HAN ,  Dong-Won PARK

    IPC分类号： G09G3/3266 ,  G09G3/3275

    摘要： A display device includes a display panel including pixels, and data lines and gate lines connected to the pixels, a timing controller configured to output source driving bit information and gate driving bit information through an intra-interface signal, a source driver configured to generate data driving signal based on the source driving bit information and to supply the data driving signal to the data lines, and a gate driver configured to generate a gate driving signal based on the gate driving bit information and to supply the gate driving signal to the gate lines, wherein the intra-interface signal is configured with predetermined data transmission units and includes both the source driving bit information and the gate driving bit information every 1 data transmission unit.