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公开(公告)号:US11600683B2
公开(公告)日:2023-03-07
申请号:US17119596
申请日:2020-12-11
Applicant: LG Display Co., Ltd.
Inventor: Yewon Hong
IPC: H01L27/32 , H01L51/56 , H01L29/786
Abstract: Discussed is a display apparatus capable of realizing a high resolution and a small power consumption, and a method for manufacturing the same, wherein the display apparatus includes a bottom gate type first thin film transistor disposed in a display area, and a top gate type second thin film transistor disposed in a non-display area.
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公开(公告)号:US11587507B2
公开(公告)日:2023-02-21
申请号:US17484596
申请日:2021-09-24
Applicant: LG DISPLAY CO., LTD.
Inventor: JungHyun Lee , Yewon Hong
IPC: G09G3/325 , G09G3/3275
Abstract: A display apparatus comprises a demultiplexing circuit portion that sequentially supplies data signals supplied from a data driving circuit to at least two data lines, and the demultiplexing circuit portion of the display apparatus comprises a switching portion that sequentially supplies the data signals to the at least two data lines based on a voltage of a control line; a voltage controller that controls the voltage of the control line in response to a time-division control signal; and a voltage discharge portion that discharges the voltage of the control line in response to the time-division control signal.
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公开(公告)号:US11468812B2
公开(公告)日:2022-10-11
申请号:US17366445
申请日:2021-07-02
Applicant: LG Display Co., Ltd.
Inventor: Yeonkyung Kim , TaeWoong Moon , JunHyeon Bae , Yewon Hong , Yeonwoo Shin
Abstract: A display apparatus comprises a display panel on which a plurality of pixels are displayed, a plurality of signal lines to which a signal required to drive the display panel is supplied, and an electrostatic discharge circuit connected between each of the plurality of signal lines and the electrostatic discharge line. The electrostatic discharge circuit includes first and second current paths between the signal line and the electrostatic discharge line, a first electrostatic discharge circuit connected to the first current path, including a plurality of first thin film transistors having a first gate electrode connected to the second current path and a second gate electrode connected to the first current path, and a second electrostatic discharge circuit connected to the second current path, including at least one second thin film transistor having a first gate electrode connected to the first current path and a second gate electrode connected to the first current path.
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公开(公告)号:US11443674B2
公开(公告)日:2022-09-13
申请号:US17465731
申请日:2021-09-02
Applicant: LG Display Co., Ltd.
Inventor: Yewon Hong , TaeWoong Moon , JunHyeon Bae , Yeonkyung Kim , Yeonwoo Shin
IPC: G09G3/20
Abstract: A display device having a gate driver, which may reduce a leakage current of a TFT and power consumption, is disclosed. Each stage of the gate driver comprises an output portion including a pull-up transistor outputting a corresponding clock of a plurality of clocks as a gate signal in response to control of a Q node, and a pull-down transistor outputting a first gate-off voltage as an off-voltage of a gate signal in response to control of a QB node; a controller charging and discharging the Q node and charging and discharging the QB node to be in an opposite state of the Q node; and a back bias circuit having a back bias node capacitance-coupled with the Q node and generating a second gate-off voltage lower than the first gate-off voltage to apply the second gate-off voltage to the back bias node for an off-period of the Q node, wherein the back bias circuit may apply the back gate bias voltage to light shielding layers of some transistors, which are turned off for the off-period of the Q node, among transistors constituting the output portion and the controller, through the back bias node, thereby reducing or minimizing a leakage current of the corresponding transistors.
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公开(公告)号:US20210193784A1
公开(公告)日:2021-06-24
申请号:US17119596
申请日:2020-12-11
Applicant: LG Display Co., Ltd.
Inventor: Yewon Hong
IPC: H01L27/32 , H01L29/786 , H01L51/56
Abstract: Discussed is a display apparatus capable of realizing a high resolution and a small power consumption, and a method for manufacturing the same, wherein the display apparatus includes a bottom gate type first thin film transistor disposed in a display area, and a top gate type second thin film transistor disposed in a non-display area.
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公开(公告)号:US20200184871A1
公开(公告)日:2020-06-11
申请号:US16504029
申请日:2019-07-05
Applicant: LG DISPLAY CO., LTD.
Inventor: Yewon Hong , JungHyun Lee , TaeWoong MOON
IPC: G09G3/20 , G09G3/3275 , G09G3/36
Abstract: A demultiplexer for sequentially outputting a data signal to a plurality of data lines disposed in a display panel can include a first switch connected to a first control node, the first switch being configured to electrically connect a first channel with a first data line among the plurality of data lines; a second switch connected to a second control node, the first switch being configured to electrically connect the first channel with a second data line among the plurality of data lines; a third switch connected to a third control node, the third switch being configured to electrically connect a second channel with a third data line among the plurality of data lines; and a fourth switch connected to a fourth control node, the fourth switch being configured to electrically connect the second channel with a fourth data line among the plurality of data lines, in which the first control node and the third control node are configured to receive a single first control signal, and be electrically disconnected from each other at a point in time, the second control node and the fourth control node are configured to receive a single second control signal, and be electrically disconnected from each other at a point in time, and the first control node and the third control node have different voltage conditions than the second control node and the fourth control node.
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公开(公告)号:US20230180558A1
公开(公告)日:2023-06-08
申请号:US18103848
申请日:2023-01-31
Applicant: LG Display Co., Ltd.
Inventor: Yewon Hong
IPC: H10K59/131 , H01L29/786 , H10K71/00
CPC classification number: H10K59/131 , H01L29/7869 , H10K71/00
Abstract: A method for manufacturing a display apparatus can include providing a first gate electrode on a substrate; providing a first active layer which overlaps with a portion of the first gate electrode; providing a second active layer on the substrate spaced apart from the first active layer; providing a first source electrode and a first drain electrode connected with the first active layer; providing a second gate electrode which overlaps with at least a portion of the second active layer; providing a second source electrode and a second drain electrode connected with the second active layer. Also, the method includes selectively providing conductivity to the second active layer, in which the first source electrode, the first drain electrode, the second gate electrode, the second source electrode, and the second drain electrode are manufactured at a same time.
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公开(公告)号:US11670239B2
公开(公告)日:2023-06-06
申请号:US17536143
申请日:2021-11-29
Applicant: LG DISPLAY CO., LTD.
Inventor: Yewon Hong
IPC: G09G3/3266 , G09G3/3225 , H01L27/12 , G09G3/36
CPC classification number: G09G3/3266 , G09G3/3225 , H01L27/1251 , G09G3/3677 , G09G2300/0819 , G09G2300/0842 , G09G2310/08 , G09G2330/02
Abstract: A gate driving circuit includes a first type of stage circuit for outputting a first gate signal and a second type of stage circuit for outputting a second gate signal, and further including a bias transistor for supplying, when turned-on, a bias voltage to a shield metal positioned to overlap with a semiconductor layer of a specific transistor among a plurality of transistors included in the first type of stage circuit, thereby preventing a leakage current from occurring inside the gate driving circuit.
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公开(公告)号:US11322068B2
公开(公告)日:2022-05-03
申请号:US17465723
申请日:2021-09-02
Applicant: LG Display Co., Ltd.
Inventor: Yewon Hong , TaeWoong Moon , JunHyeon Bae , Yeonkyung Kim , Yeonwoo Shin
IPC: G09G3/20
Abstract: A display device having a gate driver, which may reduce a leakage current of a TFT and power consumption, is disclosed. Each stage of the gate driver comprises an output portion including a pull-up transistor outputting a corresponding clock of a plurality of clocks as a gate signal in response to control of a Q node, and a pull-down transistor outputting a gate-off voltage as an off-voltage of a gate signal in response to control of a QB node; a controller charging and discharging the Q node and charging and discharging the QB node to be in an opposite state of the Q node; and a back bias circuit having a back bias node capacitance-coupled with the Q node and generating a back gate bias voltage to apply the back gate bias voltage to the back bias node for an off-period of the Q node, wherein the back bias circuit may apply the back gate bias voltage to light shielding layers of some transistors, which are turned off for the off-period of the Q node, among transistors constituting the output portion and the controller, through the back bias node, thereby reducing or minimizing a leakage current of the corresponding transistors.
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公开(公告)号:US11151920B2
公开(公告)日:2021-10-19
申请号:US16504029
申请日:2019-07-05
Applicant: LG DISPLAY CO., LTD.
Inventor: Yewon Hong , JungHyun Lee , TaeWoong Moon
IPC: G09G3/20 , G09G3/3275 , G09G3/36
Abstract: A demultiplexer for sequentially outputting a data signal to a plurality of data lines disposed in a display panel can include a first switch connected to a first control node, the first switch being configured to electrically connect a first channel with a first data line among the plurality of data lines; a second switch connected to a second control node, the first switch being configured to electrically connect the first channel with a second data line among the plurality of data lines; a third switch connected to a third control node, the third switch being configured to electrically connect a second channel with a third data line among the plurality of data lines; and a fourth switch connected to a fourth control node, the fourth switch being configured to electrically connect the second channel with a fourth data line among the plurality of data lines, in which the first control node and the third control node are configured to receive a single first control signal, and be electrically disconnected from each other at a point in time, the second control node and the fourth control node are configured to receive a single second control signal, and be electrically disconnected from each other at a point in time, and the first control node and the third control node have different voltage conditions than the second control node and the fourth control node.
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