公开(公告)号：US20140291669A1

公开(公告)日：2014-10-02

申请号：US14219385

申请日：2014-03-19

Applicant: LG Display Co., Ltd.

Inventor： KwangHwan Ji ,  DaeHwan Kim ,  JunHyeon Bae

IPC: H01L29/786 ,  H01L21/02 ,  H01L21/70 ,  H01L29/66 ,  H01L27/12

CPC classification number: H01L29/7869 ,  H01L27/1225 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78612 ,  H01L29/78696

Abstract: A thin-film transistor includes a substrate, a first gate electrode formed on the substrate, a first active layer that is formed on the substrate and includes a first oxide semiconductor layer and a first barrier layer, a second active layer that is formed on the first active layer and includes a second oxide semiconductor layer and an intermediate barrier layer, a gate insulating layer that is formed on the second active layer, a second gate electrode that is formed on the gate insulating layer and is electrically connected to the first gate electrode, an interlayer insulating film formed on the second gate electrode, the first active layer and the second active layer, and a source electrode and a drain electrode electrically connected to the first active layer and the second active layer.

Abstract translation: 薄膜晶体管包括基板，形成在基板上的第一栅电极，形成在基板上并包括第一氧化物半导体层和第一势垒层的第一有源层，形成在第一有源层上的第二有源层， 第一有源层，并且包括第二氧化物半导体层和中间阻挡层，形成在第二有源层上的栅极绝缘层，形成在栅极绝缘层上并与第一栅电极电连接的第二栅电极 形成在第二栅电极，第一有源层和第二有源层上的层间绝缘膜，以及与第一有源层和第二有源层电连接的源电极和漏电极。

公开(公告)号：US11322068B2

公开(公告)日：2022-05-03

申请号：US17465723

申请日：2021-09-02

Applicant: LG Display Co., Ltd.

Inventor： Yewon Hong ,  TaeWoong Moon ,  JunHyeon Bae ,  Yeonkyung Kim ,  Yeonwoo Shin

IPC: G09G3/20

Abstract: A display device having a gate driver, which may reduce a leakage current of a TFT and power consumption, is disclosed. Each stage of the gate driver comprises an output portion including a pull-up transistor outputting a corresponding clock of a plurality of clocks as a gate signal in response to control of a Q node, and a pull-down transistor outputting a gate-off voltage as an off-voltage of a gate signal in response to control of a QB node; a controller charging and discharging the Q node and charging and discharging the QB node to be in an opposite state of the Q node; and a back bias circuit having a back bias node capacitance-coupled with the Q node and generating a back gate bias voltage to apply the back gate bias voltage to the back bias node for an off-period of the Q node, wherein the back bias circuit may apply the back gate bias voltage to light shielding layers of some transistors, which are turned off for the off-period of the Q node, among transistors constituting the output portion and the controller, through the back bias node, thereby reducing or minimizing a leakage current of the corresponding transistors.

公开(公告)号：US10283531B2

公开(公告)日：2019-05-07

申请号：US15660803

申请日：2017-07-26

Applicant: LG Display Co., Ltd.

Inventor： JunHyeon Bae ,  JongUk Bae

IPC: H01L29/786 ,  H01L29/66 ,  H01L29/417 ,  H01L21/8238 ,  H01L21/18 ,  H01L21/425 ,  H01L29/10 ,  H01L27/12 ,  H01L21/44 ,  H01L21/34

Abstract: Disclosed is a thin film transistor including both an N-type semiconductor layer and a P-type semiconductor layer, a method for manufacturing the same, and a display device including the same, wherein the thin film transistor may include a first gate electrode on a substrate; a first gate insulating film covering the first gate electrode; a semiconductor layer on the first gate insulating film; a second gate insulating film covering the semiconductor layer; and a second gate electrode on the second gate insulating film, wherein the semiconductor layer includes the N-type semiconductor layer and the P-type semiconductor layer.

公开(公告)号：US20220093027A1

公开(公告)日：2022-03-24

申请号：US17465723

申请日：2021-09-02

Applicant: LG Display Co., Ltd.

Inventor： Yewon Hong ,  TaeWoong Moon ,  JunHyeon Bae ,  Yeonkyung Kim ,  Yeonwoo Shin

IPC: G09G3/20

Abstract: A display device having a gate driver, which may reduce a leakage current of a TFT and power consumption, is disclosed. Each stage of the gate driver comprises an output portion including a pull-up transistor outputting a corresponding clock of a plurality of clocks as a gate signal in response to control of a Q node, and a pull-down transistor outputting a gate-off voltage as an off-voltage of a gate signal in response to control of a QB node; a controller charging and discharging the Q node and charging and discharging the QB node to be in an opposite state of the Q node; and a back bias circuit having a back bias node capacitance-coupled with the Q node and generating a back gate bias voltage to apply the back gate bias voltage to the back bias node for an off-period of the Q node, wherein the back bias circuit may apply the back gate bias voltage to light shielding layers of some transistors, which are turned off for the off-period of the Q node, among transistors constituting the output portion and the controller, through the back bias node, thereby reducing or minimizing a leakage current of the corresponding transistors.

公开(公告)号：US10396099B2

公开(公告)日：2019-08-27

申请号：US15391636

申请日：2016-12-27

Applicant: LG Display Co., Ltd.

Inventor： JongUk Bae ,  YongHo Jang ,  JunHyeon Bae ,  Kwanghwan Ji ,  PilSang Yun ,  Jiyong Noh

IPC: H01L27/12 ,  G02F1/1368 ,  H01L27/32 ,  G02F1/1362 ,  H01L29/786 ,  G09G3/36 ,  G09G3/3266 ,  G09G3/3258 ,  G09G3/3275 ,  H01L29/417 ,  H01L29/66

Abstract: Disclosed are an oxide thin film transistor (TFT), a method of manufacturing the same, and a display panel and a display device using the same, in which a first conductor and a second conductor are provided at end portions of a semiconductor layer formed of oxide semiconductor. The first conductor and second conductor are electrically connected to a first electrode and a second electrode, and covered by a gate insulation layer. The oxide TFT includes a semiconductor layer provided on a buffer and including an oxide semiconductor, a gate insulation layer covering the semiconductor layer and the buffer, a gate electrode provided on the gate insulation layer to overlap a portion of the semiconductor layer, and a passivation layer covering the gate and the gate insulation layer.

公开(公告)号：US11468812B2

公开(公告)日：2022-10-11

申请号：US17366445

申请日：2021-07-02

Applicant: LG Display Co., Ltd.

Inventor： Yeonkyung Kim ,  TaeWoong Moon ,  JunHyeon Bae ,  Yewon Hong ,  Yeonwoo Shin

IPC: H02H9/04 ,  H01L27/02 ,  G09G3/20

Abstract: A display apparatus comprises a display panel on which a plurality of pixels are displayed, a plurality of signal lines to which a signal required to drive the display panel is supplied, and an electrostatic discharge circuit connected between each of the plurality of signal lines and the electrostatic discharge line. The electrostatic discharge circuit includes first and second current paths between the signal line and the electrostatic discharge line, a first electrostatic discharge circuit connected to the first current path, including a plurality of first thin film transistors having a first gate electrode connected to the second current path and a second gate electrode connected to the first current path, and a second electrostatic discharge circuit connected to the second current path, including at least one second thin film transistor having a first gate electrode connected to the first current path and a second gate electrode connected to the first current path.

公开(公告)号：US11443674B2

公开(公告)日：2022-09-13

申请号：US17465731

申请日：2021-09-02

Applicant: LG Display Co., Ltd.

Inventor： Yewon Hong ,  TaeWoong Moon ,  JunHyeon Bae ,  Yeonkyung Kim ,  Yeonwoo Shin

IPC: G09G3/20

Abstract: A display device having a gate driver, which may reduce a leakage current of a TFT and power consumption, is disclosed. Each stage of the gate driver comprises an output portion including a pull-up transistor outputting a corresponding clock of a plurality of clocks as a gate signal in response to control of a Q node, and a pull-down transistor outputting a first gate-off voltage as an off-voltage of a gate signal in response to control of a QB node; a controller charging and discharging the Q node and charging and discharging the QB node to be in an opposite state of the Q node; and a back bias circuit having a back bias node capacitance-coupled with the Q node and generating a second gate-off voltage lower than the first gate-off voltage to apply the second gate-off voltage to the back bias node for an off-period of the Q node, wherein the back bias circuit may apply the back gate bias voltage to light shielding layers of some transistors, which are turned off for the off-period of the Q node, among transistors constituting the output portion and the controller, through the back bias node, thereby reducing or minimizing a leakage current of the corresponding transistors.

公开(公告)号：US09379249B2

公开(公告)日：2016-06-28

申请号：US14219385

申请日：2014-03-19

Applicant: LG Display Co., Ltd.

Inventor： KwangHwan Ji ,  DaeHwan Kim ,  JunHyeon Bae

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L27/1225 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78612 ,  H01L29/78696

Abstract: A thin-film transistor includes a substrate, a first gate electrode formed on the substrate, a first active layer that is formed on the substrate and includes a first oxide semiconductor layer and a first barrier layer, a second active layer that is formed on the first active layer and includes a second oxide semiconductor layer and an intermediate barrier layer, a gate insulating layer that is formed on the second active layer, a second gate electrode that is formed on the gate insulating layer and is electrically connected to the first gate electrode, an interlayer insulating film formed on the second gate electrode, the first active layer and the second active layer, and a source electrode and a drain electrode electrically connected to the first active layer and the second active layer.

Abstract translation: 薄膜晶体管包括基板，形成在基板上的第一栅电极，形成在基板上并包括第一氧化物半导体层和第一势垒层的第一有源层，形成在第一有源层上的第二有源层， 第一有源层，并且包括第二氧化物半导体层和中间阻挡层，形成在第二有源层上的栅极绝缘层，形成在栅极绝缘层上并与第一栅电极电连接的第二栅电极 形成在第二栅电极，第一有源层和第二有源层上的层间绝缘膜，以及与第一有源层和第二有源层电连接的源电极和漏电极。