公开(公告)号：US20140281080A1

公开(公告)日：2014-09-18

申请号：US13828511

申请日：2013-03-14

Applicant: Linear Technology Corporation

Inventor： Daniel James EDDLEMAN

IPC: G06F13/42

CPC classification number: G06F13/4291

Abstract: A novel readdressing circuit is provided for supporting data communications over a data line and a clock line between at least one master device and multiple slave devices. For example, the master device and the multiple slave devices may be configured to communicate over an I2C bus including the data line and the clock line. The readdressing circuit has a data input node for receiving a data signal transferred over the data line and including an address word produced by the master device, and a data output node coupled to the multiple slave devices. The readdressing circuit also includes an address generator and an address transmit detections circuit. The address generator is configured for storing a multi-bit fixed offset value. The address generator is responsive to the address word at the data input node for generating multiple unique addresses for the multiple slave devices. The address transmit detection circuit is configured for enabling the address generator to generate the multiple unique addresses at the data output node when the address word is detected at the data input node, and for preventing an output signal of the address generator from being supplied to the data output node when no address word is detected at the data input node.

Abstract translation: 提供了一种新颖的再现电路，用于支持数据线上的数据通信和至少一个主设备与多个从设备之间的时钟线。 例如，主设备和多个从设备可以被配置为通过包括数据线和时钟线的I2C总线进行通信。 再现电路具有数据输入节点，用于接收通过数据线传输的数据信号，并包括由主设备产生的地址字，以及耦合到多个从设备的数据输出节点。 再现电路还包括地址发生器和地址发送检测电路。 地址发生器被配置为存储多位固定偏移值。 地址发生器响应于数据输入节点处的地址字，用于为多个从设备生成多个唯一地址。 地址发送检测电路被配置为使得地址发生器能够在数据输出节点处检测到地址字时在数据输出节点处产生多个唯一地址，并且防止地址发生器的输出信号被提供给 数据输出节点在数据输入节点没有检测到地址字时。

公开(公告)号：US20160218501A1

公开(公告)日：2016-07-28

申请号：US15088714

申请日：2016-04-01

Applicant: LINEAR TECHNOLOGY CORPORATION

Inventor： Daniel James EDDLEMAN ,  Mitchell Edward LEE ,  Zhizhong HOU

IPC: H02H5/04 ,  H03K17/082

CPC classification number: H02H5/04 ,  H01C1/16 ,  H03K17/08104 ,  H03K17/0822 ,  H03K2017/0806

Abstract: A circuit for protecting a semiconductor element is provided in a system for supplying power from an input node to an output node. The circuit has an analog multiplier responsive to a voltage across the semiconductor element and a current flowing through the semiconductor element to produce an output voltage. A transconductance amplifier is coupled to an output of the analog multiplier for receiving the output voltage of the analog multiplier to produce an output current. An analog RC circuit coupled to the output of the transconductance amplifier is configurable to include a selected number of resistive elements having selected resistance values and a selected number of capacitive elements having selected capacitance values. The configuration of the RC circuit is carried out to provide an RC thermal model that reproduces a desired thermal behavior of the semiconductor element. The RC circuit is responsive to the output current of the transconductance amplifier to produce an output voltage used to control the semiconductor element.

Abstract translation: 用于保护半导体元件的电路设置在用于从输入节点向输出节点供电的系统中。 电路具有对半导体元件两端的电压和流过半导体元件的电流产生输出电压的模拟乘法器。 跨导放大器耦合到模拟乘法器的输出端，用于接收模拟乘法器的输出电压以产生输出电流。 耦合到跨导放大器的输出的模拟RC电路可配置为包括具有选定电阻值的所选数量的电阻元件和具有所选电容值的所选数量的电容元件。 执行RC电路的配置以提供再现半导体元件的期望热行为的RC热模型。 RC电路响应于跨导放大器的输出电流以产生用于控制半导体元件的输出电压。