公开(公告)号：US08803573B2

公开(公告)日：2014-08-12

申请号：US13647470

申请日：2012-10-09

Applicant: LSI Corporation

Inventor： Vladimir Sindalovsky ,  Joseph Anidjar ,  Lane A. Smith ,  Brett David Hardy

IPC: H03L7/06

CPC classification number: H03L7/0807 ,  H03L7/087 ,  H03L7/1075 ,  H03L7/146 ,  H03L2207/06

Abstract: In described embodiments, a VCO based CDR for a SerDes device includes a phase detector, a VCO responsive to a first control signal and a second control signal and generating an output signal, a frequency calibration module configured to calibrate the frequency of the output signal by performing a coarse calibration and a subsequent fine calibration, a gear shifting control module controlling a gain change of the first and second control signals in time, and a look-up table created by fine calibration values generated from the frequency calibration module, wherein the programmed variable gain of the gear shifting control module is calculated by a calculation circuit employing the fine calibration values stored in the look-up table, the calculation of the calculation circuit adjusts gear shifting down, and adjusts a gear shifting gain, and adjusting an overall CDR gain over a VCO control curve.

Abstract translation: 在所描述的实施例中，用于SerDes设备的基于VCO的CDR包括相位检测器，响应于第一控制信号的VCO和第二控制信号，并产生输出信号;频率校准模块，被配置为通过以下步骤校准输出信号的频率 执行粗略校准和随后的精细校准，齿轮控制模块及时控制第一和第二控制信号的增益变化，以及通过由频率校准模块产生的精细校准值产生的查找表，其中编程 通过采用存储在查表中的精细校准值的计算电路来计算变速控制模块的可变增益，计算电路的计算调节换档增益，并且调整换档增益，并且调整总体CDR 增益超过VCO控制曲线。

公开(公告)号：US20140097878A1

公开(公告)日：2014-04-10

申请号：US13647470

申请日：2012-10-09

Applicant: LSI Corporation

Inventor： Vladimir Sindalovsky ,  Joseph Anidjar ,  Lane A. Smith ,  Brett David Hardy

IPC: H03L7/08

CPC classification number: H03L7/0807 ,  H03L7/087 ,  H03L7/1075 ,  H03L7/146 ,  H03L2207/06

Abstract: In described embodiments, a VCO based CDR for a SerDes device includes a phase detector, a VCO responsive to a first control signal and a second control signal and generating an output signal, a frequency calibration module configured to calibrate the frequency of the output signal by performing a coarse calibration and a subsequent fine calibration, a gear shifting control module controlling a gain, change of the first and second control signals in time, and a look-up table created by fine calibration values generated from the frequency calibration module, wherein the programmed variable gain of the gear shifting control module is calculated by a calculation circuit employing the fine calibration values stored in the look-up table, the calculation of the calculation circuit adjusts gear shifting down, and adjusts a gear shifting gain, and adjusting an overall CDR gain over a VCO control curve.

Abstract translation: 在所描述的实施例中，用于SerDes设备的基于VCO的CDR包括相位检测器，响应于第一控制信号的VCO和第二控制信号并产生输出信号，频率校准模块被配置为通过以下步骤校准输出信号的频率 执行粗略校准和随后的精细校准，齿轮控制模块控制增益，第一和第二控制信号在时间上的变化，以及由从频率校准模块产生的精细校准值产生的查找表，其中， 通过采用存储在查找表中的精细校准值的计算电路来计算变速控制模块的编程可变增益，计算电路的计算调整换档降档，并且调整换档增益，并且调整总体 VCO控制曲线上的CDR增益。