公开(公告)号：US5740068A

公开(公告)日：1998-04-14

申请号：US655790

申请日：1996-05-30

申请人： Lars Wolfgang Liebmann ,  Robert Thomas Sayah ,  John Edward Barth, Jr.

发明人： Lars Wolfgang Liebmann ,  Robert Thomas Sayah ,  John Edward Barth, Jr.

IPC分类号： G03F1/00 ,  G03F1/36 ,  G03F7/20 ,  H01L21/027 ,  G03F7/00 ,  H01J37/304

CPC分类号： G03F7/70441 ,  G03F1/36

摘要： A method for performing optical proximity correction is disclosed that not only limits the optical proximity correction to electrically relevant structures, but also improves the accuracy of the corrections by processing individual feature edges, and minimizes the mask manufacturing impacts by avoiding the introduction of jogs into the design. Critical edge regions of the relevant electrical structures are analyzed, sorted and manipulated to receive optical proximity corrections.

摘要翻译： 公开了一种用于执行光学邻近校正的方法，其不仅将光学邻近校正限制到电气相关结构，而且还通过处理单个特征边缘来提高校正的精度，并且通过避免将点动灯引入到接近校正中来最小化掩模制造影响 设计。 对相关电气结构的临界边缘区域进行分析，分类和操作以接收光学邻近校正。

公开(公告)号：US5923562A

公开(公告)日：1999-07-13

申请号：US733584

申请日：1996-10-18

申请人： Lars W. Liebmann ,  Robert Thomas Sayah

发明人： Lars W. Liebmann ,  Robert Thomas Sayah

IPC分类号： H01L21/027 ,  G06F17/00 ,  G06F17/50 ,  H01L20060101

CPC分类号： G06F17/5068 ,  G06F2217/12 ,  Y02P90/265

摘要： A method automatically locates and eliminates the most frequently encountered phase conflict in phase edge phase shift mask (PSM) designs used in the manufacture of VLSI circuits. The process is implemented as an automatic CAD routine that locates and widens one leg of a three way intersection to avoid phase conflicts. CAD and design rule checking techniques are used to first locate and then to resolve design conflicts prior to actually executing the very time consuming phase shift mask design. The original circuit design is manipulated prior to or as part of the design rule checking, allowing the verification of the manipulations made prior to handing the design off to the mask layout and mask data preparation group.

摘要翻译： 一种方法自动定位并消除了在制造VLSI电路中使用的相位边缘相移掩模（PSM）设计中最常遇到的相位冲突。 该过程被实现为自动CAD程序，其定位和加宽三路交叉口的一条腿以避免相位冲突。 CAD和设计规则检查技术用于首先定位，然后在实际执行非常耗时的相移掩模设计之前解决设计冲突。 原始电路设计在设计规则检查之前或作为设计规则检查的一部分进行操作，允许在将设计移交到掩模布局和掩模数据准备组之前进行的操作的验证。