Supplying voltage to a memory module
    3.
    发明授权
    Supplying voltage to a memory module 有权
    向内存模块供电

    公开(公告)号:US06516381B1

    公开(公告)日:2003-02-04

    申请号:US09407159

    申请日:1999-09-28

    IPC分类号: G06F1300

    CPC分类号: G06F13/4072

    摘要: Included in the system are a memory module, a controller, and a voltage regulator. The memory module stores data indicating a level of voltage needed for operation. The controller obtains the data from the memory module and outputs a signal, based on the data, indicating the level of voltage needed by the memory module. The voltage regulator receives the signal from the controller, and supplies the level of voltage to the memory module in accordance with the signal.

    摘要翻译: 系统中包括存储器模块,控制器和电压调节器。 存储器模块存储指示操作所需的电压水平的数据。 控制器从存储器模块获取数据,并且基于指示存储器模块所需的电压电平的数据输出信号。 电压调节器接收来自控制器的信号,并根据该信号将电压电平提供给存储器模块。

    Mitigation of electromagnetic interference
    4.
    发明申请
    Mitigation of electromagnetic interference 审中-公开
    减轻电磁干扰

    公开(公告)号:US20060063495A1

    公开(公告)日:2006-03-23

    申请号:US10944715

    申请日:2004-09-21

    申请人: Tony Hamilton

    发明人: Tony Hamilton

    IPC分类号: H04B1/38

    CPC分类号: H04B15/02

    摘要: A system design may include electromagnetic sensors and/or placement of components to address problems of near-field electromagnetic interference caused by a processor within the system, and may further include measures to mitigate interference when detected.

    摘要翻译: 系统设计可以包括电磁传感器和/或组件的放置以解决由系统内的处理器引起的近场电磁干扰的问题,并且还可以包括当检测到时减轻干扰的措施。

    Method and apparatus for a computing system having an active sleep mode CPU that uses the Cache of a normal active mode CPU
    5.
    发明申请
    Method and apparatus for a computing system having an active sleep mode CPU that uses the Cache of a normal active mode CPU 有权
    具有使用正常活动模式CPU的Cache的主动睡眠模式CPU的计算系统的方法和装置

    公开(公告)号:US20060212733A1

    公开(公告)日:2006-09-21

    申请号:US11437511

    申请日:2006-05-18

    申请人: Tony Hamilton

    发明人: Tony Hamilton

    IPC分类号: G06F1/00

    摘要: A method is described that involves storing active sleep mode software instructions to be executed by a low end central processing unit into an on chip cache of a high end central processing unit that caches normal active mode software instructions executed by the high end central processing unit. The active sleep mode software instructions are to be executed by the low end central processing unit during an active sleep mode. The normal active mode software instructions are executed by the high end central processing unit during a normal active mode. The active sleep mode consumes less power than the normal active mode.

    摘要翻译: 描述了一种方法,其涉及将要由低端中央处理单元执行的主动睡眠模式软件指令存储到高端中央处理单元的片上高速缓存中,高速中央处理单元高速缓存由高端中央处理单元执行的正常活动模式软件指令。 主动睡眠模式软件指令将在主动睡眠模式期间由低端中央处理单元执行。 正常的活动模式软件指令在正常的活动模式期间由高端中央处理单元执行。 主动睡眠模式消耗的功率比正常活动模式少。