Low-impedance high-swing power supply with integrated high positive and negative DC voltage protection and electro-static discharge (ESD) protection
    1.
    发明授权
    Low-impedance high-swing power supply with integrated high positive and negative DC voltage protection and electro-static discharge (ESD) protection 有权
    低阻抗高压摆动电源具有集成的高正,负直流电压保护和静电放电(ESD)保护

    公开(公告)号:US08760829B2

    公开(公告)日:2014-06-24

    申请号:US13437352

    申请日:2012-04-02

    IPC分类号: H02H9/00

    CPC分类号: H02H9/046

    摘要: An apparatus comprises a first PFET including a first intrinsic body diode; an electrostatic discharge (ESD) subcircuit coupled to a source of the first PFET; a reverse bias voltage element, such as a zener diode, an anode of which is coupled to a gate of the first PFET; a second PFET having a source coupled to a cathode of the zener diode a capacitor coupled to a gate the second PFET; and a first resistor coupled to the gate of the second PFET. The apparatus can protect against both positive and negative electro static transient discharge events.

    摘要翻译: 一种装置包括:第一PFET,包括第一本征体二极管; 耦合到第一PFET的源极的静电放电(ESD)子电路; 反向偏置电压元件,例如齐纳二极管,其阳极耦合到第一PFET的栅极; 第二PFET,其源极耦合到齐纳二极管的阴极,电容器耦合到栅极第二PFET; 以及耦合到第二PFET的栅极的第一电阻器。 该装置可以防止正和负静电瞬态放电事件。

    Low-Impedance High-Swing Power Supply with Integrated High Positive and Negative DC Voltage Protection and Electro-Static Discharge (ESD) Protection
    2.
    发明申请
    Low-Impedance High-Swing Power Supply with Integrated High Positive and Negative DC Voltage Protection and Electro-Static Discharge (ESD) Protection 有权
    具有集成高正,负直流电压保护和静电放电(ESD)保护的低阻抗高速摆动电源

    公开(公告)号:US20130188286A1

    公开(公告)日:2013-07-25

    申请号:US13437352

    申请日:2012-04-02

    IPC分类号: H02H9/04

    CPC分类号: H02H9/046

    摘要: An apparatus comprises a first PFET including a first intrinsic body diode; an electrostatic discharge (ESD) subcircuit coupled to a source of the first PFET; a reverse bias voltage element, such as a zener diode, an anode of which is coupled to a gate of the first PFET; a second PFET having a source coupled to a cathode of the zener diode a capacitor coupled to a gate the second PFET; and a first resistor coupled to the gate of the second PFET. The apparatus can protect against both positive and negative electro static transient discharge events.

    摘要翻译: 一种装置包括:第一PFET,包括第一本征体二极管; 耦合到第一PFET的源极的静电放电(ESD)子电路; 反向偏置电压元件,例如齐纳二极管,其阳极耦合到第一PFET的栅极; 第二PFET,其源极耦合到齐纳二极管的阴极,电容器耦合到栅极第二PFET; 以及耦合到第二PFET的栅极的第一电阻器。 该装置可以防止正和负静电瞬态放电事件。

    Random interleaving dither for sigma-delta analog-to-digital converters
    3.
    发明授权
    Random interleaving dither for sigma-delta analog-to-digital converters 有权
    用于Σ-Δ模数转换器的随机交错抖动

    公开(公告)号:US06975255B1

    公开(公告)日:2005-12-13

    申请号:US10947039

    申请日:2004-09-21

    申请人: Weibiao Zhang

    发明人: Weibiao Zhang

    IPC分类号: H03M1/20 H03M3/04

    CPC分类号: H03M3/332 H03M3/424 H03M3/454

    摘要: A dithering method is provided for sigma-delta converters in a deep-submicron process. The dither is a random interleaving of quantizer thresholds levels. The random interleaving dither is more effective than previous static dither methods to remove idle channel tones of sigma-delta analog-to-digital converters (ADC). The dither is easy to implement and takes less area than other dynamic dither methods.

    摘要翻译: 在深亚微米工艺中为Σ-Δ转换器提供抖动方法。 抖动是量化器阈值水平的随机交错。 随机交错抖动比先前的静态抖动方法更有效,以去除Σ-Δ模数转换器(ADC)的空闲信道音调。 抖动易于实现,占用的面积比其他动态抖动方法要少。

    Method of configuring a switch network for programmable gain amplifiers
    4.
    发明授权
    Method of configuring a switch network for programmable gain amplifiers 有权
    配置可编程增益放大器的开关网络的方法

    公开(公告)号:US06549075B1

    公开(公告)日:2003-04-15

    申请号:US10125760

    申请日:2002-04-18

    申请人: Weibiao Zhang

    发明人: Weibiao Zhang

    IPC分类号: H03C320

    CPC分类号: H03G3/001

    摘要: A method of configuring a switch-network to implement programmable gain devices such as Programmable Gain Amplifiers (PGAs). The method provides high-accuracy and low-distortion with small area requirements and less sensitivity to process and temperature variations when compared with traditional programmable gain architectures where the gain is determined by a ratio between one or more fixed resistors and one or more programmable resistors.

    摘要翻译: 一种配置交换网络以实现诸如可编程增益放大器(PGA)的可编程增益器件的方法。 与传统的可编程增益架构相比,该方法提供了具有小面积要求的高精度和低失真,并且与传统的可编程增益架构相比,处理和温度变化的灵敏度较低,其中增益由一个或多个固定电阻和一个或多个可编程电阻之间的比率决定。

    Reverse voltage protection circuit
    5.
    发明授权
    Reverse voltage protection circuit 有权
    反向电压保护电路

    公开(公告)号:US08120884B2

    公开(公告)日:2012-02-21

    申请号:US12702699

    申请日:2010-02-09

    申请人: Weibiao Zhang

    发明人: Weibiao Zhang

    CPC分类号: H02H11/003

    摘要: A voltage protection circuit that has a protection transistor coupled between a voltage supply pin of an integrated circuit and a voltage output terminal of the integrated circuit. A biasing circuit is coupled to a control node of the protection transistor and configured to cause the protection transistor to turn on to form a low impedance path between the voltage supply pin and the voltage output terminal when a positive supply voltage is coupled to the voltage supply terminal and to cause the protection transistor to turn off when a negative supply voltage is coupled to the voltage supply terminal. An electro-static discharge (ESD) protection circuit may also be connected between the voltage supply pin and a reference node that is configured to conduct a negative static discharge current for period of time, and to not conduct a negative current continuously.

    摘要翻译: 一种电压保护电路,其具有耦合在集成电路的电压引脚和集成电路的电压输出端子之间的保护晶体管。 偏置电路耦合到保护晶体管的控制节点,并且被配置为当正电源电压耦合到电压源时,使保护晶体管导通以在电压供应引脚和电压输出端子之间形成低阻抗路径 并且当负电源电压耦合到电压提供端时,使保护晶体管截止。 静电放电(ESD)保护电路也可以连接在电源引脚和被配置为在一段时间内进行负静态放电电流的参考节点之间,并且不连续地导通负电流。

    Current-steering digital-to-analog converter having a minimum charge injection latch
    6.
    发明授权
    Current-steering digital-to-analog converter having a minimum charge injection latch 有权
    具有最小电荷注入锁存器的电流转向数模转换器

    公开(公告)号:US06992608B2

    公开(公告)日:2006-01-31

    申请号:US10823046

    申请日:2004-04-13

    IPC分类号: H03M1/66

    CPC分类号: H03M1/0624 H03M1/747

    摘要: A latch architecture for driving unit current cell of a current-steering digital-to-analog converter (DAC) which reduces the drain-source voltage variation of the output current-source transistors and reduces the coupling of unwanted injection of input digital signals as well as clock signals is presented herein. Moreover, this latch helps to achieve lower glitch during code transition with improved dynamic performance. The latch effectively uses the intrinsic RC delay of most transistors within the latch architecture in order to achieve optimal crossing points of complementary control signals. Unwanted input injection or cross-talk is reduced by introducing transistors (904, 906, 932 and 934) that are off during code transitions without compromising the DAC update speed. Conflicts between currently held and new inputs are avoided in an effort to reduce the harmonic distortion. Furthermore, the distortion as a result of the clock signal fed through each transistor in the first and second subcircuit portions cancel each other.

    摘要翻译: 用于驱动电流转向数模转换器(DAC)的单元电流单元的锁存架构,其减小输出电流源晶体管的漏源电压变化,并减少输入数字信号的不期望的注入的耦合 因为这里呈现时钟信号。 此外,该锁存器有助于在代码转换期间实现较低的毛刺,并提高动态性能。 锁存器有效地使用锁存器架构内大多数晶体管的固有RC延迟,以实现互补控制信号的最佳交叉点。 通过引入在代码转换期间关闭而不损害DAC更新速度的晶体管(904,906,932和934)来减少不需要的输入注入或串扰。 为了减少谐波失真,避免了当前持有的和新的输入之间的冲突。 此外,作为通过第一和第二子电路中的每个晶体管馈送的时钟信号的结果的失真彼此抵消。

    Gain control circuits for voltage controlled oscillators
    7.
    发明授权
    Gain control circuits for voltage controlled oscillators 有权
    用于压控振荡器的增益控制电路

    公开(公告)号:US06985045B2

    公开(公告)日:2006-01-10

    申请号:US10791937

    申请日:2004-03-02

    IPC分类号: H03L5/00

    CPC分类号: H03L7/099 H03K4/501

    摘要: A gain controlled voltage controlled oscillator. A current controlled oscillator is adapted to provide an output signal oscillating at a frequency controllable by controlling a current applied thereto. A first current source provides a first control current controllable by controlling a voltage applied thereto that has a predetermined range. A first current mirror is adapted to mirror the control current to the current controlled oscillator. A second current source is adapted to provide a second control current for mirroring to the current controlled oscillator by the first current mirror when the control voltage is in a low portion of the range.

    摘要翻译: 增益控制压控振荡器。 电流控制振荡器适于提供以通过控制施加到其上的电流可控的频率振荡的输出信号。 第一电流源通过控制施加到其上的具有预定范围的电压来提供可控制的第一控制电流。 第一电流镜适于将控制电流镜像到当前受控振荡器。 当控制电压处于该范围的低部分时,第二电流源适于提供用于通过第一电流镜将电流控制振荡器镜像的第二控制电流。

    Battery cell tab monitor
    8.
    发明授权
    Battery cell tab monitor 有权
    电池单元选项卡监视器

    公开(公告)号:US08547064B2

    公开(公告)日:2013-10-01

    申请号:US12687173

    申请日:2010-01-14

    IPC分类号: H02J7/00 G01R31/36

    CPC分类号: H02J7/0021 G01R31/3658

    摘要: A battery cell tab monitoring apparatus includes a conductive element electrically connected between two battery cells. The conductive element is connected to a sensing circuit including a pull-down current source connected to pull current from the conductive element and/or a pull-up current source connected to drive current into the conductive element. A voltage measuring circuit is connected to sense voltages during operation of the pull-down current source and the pull-up current source to be used to determine the status of the conductive element. For instance, voltages beyond certain fixed or variable thresholds indicate that the conductive element is flexing or cracking, which can be a precursor to its breaking. Voltages beyond other fixed or variable thresholds indicate that the conductive element is fully disconnected. The current sources used to push and pull the sensing currents may be used to bring the battery cells into balance when an imbalance is detected.

    摘要翻译: 电池单元片监视装置包括电连接在两个电池单元之间的导电元件。 导电元件连接到感测电路,该感测电路包括连接到从导电元件拉出电流的下拉电流源和/或连接到驱动电流到导电元件中的上拉电流源。 电压测量电路连接到用于确定导电元件的状态的下拉电流源和上拉电流源的操作期间的感测电压。 例如,超过某些固定或可变阈值的电压表示导电元件是弯曲或开裂的,这可能是其破坏的前兆。 超出其他固定或可变阈值的电压表示导电元件完全断开。 当检测到不平衡时,用于推和拉感测电流的电流源可用于使电池单元平衡。

    Apparatus for and method of performing a conversion operation

    公开(公告)号:US06563444B2

    公开(公告)日:2003-05-13

    申请号:US09820801

    申请日:2001-03-30

    IPC分类号: H03M110

    CPC分类号: H03M1/1061 H03M1/747

    摘要: In accordance with a preferred embodiment, a self-calibrated cell (and corresponding operation) is provided that receives a reference parameter (e.g., current, voltage, etc.) for storage in the cell and for supplying to a load. The individual cell is controlled to operate in different states or modes: either a redundant mode or a supplying mode. In the redundant mode, the reference parameter is stored in the current cell during a calibration phase or mode, and the stored reference parameter is dumped or otherwise transferred, preferably to ground, during a dumping state or mode. In the supplying mode, the current cell transfers or supplies the stored reference parameter to the load. The individual cell is controlled to operate in its dumping state both before the cell enters the calibration mode and also at the same time that the cell is switched from the calibration mode to the supplying mode. In accordance with a preferred embodiment, the individual cells may be employed in a cell array of a converter (e.g., digital-to-analog converter). All of the cells in the array may individually be placed in a redundant mode in succession, while the remaining cells are in a supplying mode.

    Low-voltage dual-power-path management architecture for rechargeable battery monitoring solutions
    10.
    发明授权
    Low-voltage dual-power-path management architecture for rechargeable battery monitoring solutions 有权
    低电压双电源路径管理架构,用于充电电池监控解决方案

    公开(公告)号:US08541981B2

    公开(公告)日:2013-09-24

    申请号:US12943326

    申请日:2010-11-10

    IPC分类号: H02J7/00

    CPC分类号: H02J7/0021 H02J7/0026

    摘要: A control circuit of a battery power-path management circuit establishes a first power path between a battery input node and an output node when the input node voltage is larger than a charger input node voltage and a second power path between the charger input node and the output node when the voltage on the charger input node is larger than the battery input node voltage. It controls the second power path to provide power to the output node, enabling battery charging and protection over a battery voltage range from about zero volts. It has low power consumption and can support wide-swing power supply voltage from as low as one volt to as high as maximum allowed Vds of drain-extended devices. It can use smaller device sizes because the PMOS switch gate voltage is 0V when the power supply is not too high.

    摘要翻译: 电池电源路径管理电路的控制电路在输入节点电压大于充电器输入节点电压和充电器输入节点与充电器输入节点之间的第二电源路径时,建立电池输入节点与输出节点之间的第一电力路径 输出节点,当充电器输入节点上的电压大于电池输入节点电压时。 它控制第二个电源通路,为输出节点提供电源,从而能够在电压从零伏左右的电压范围内进行充电和保护。 它具有低功耗,并且可以支持从低至一伏的宽摆幅电源电压到最大允许的漏极扩展器件的Vds。 它可以使用较小的器件尺寸,因为当电源不太高时,PMOS开关栅极电压为0V。