Pressure transducer having structure for monitoring surface charge
    1.
    发明授权
    Pressure transducer having structure for monitoring surface charge 有权
    压力传感器具有监测表面电荷的结构

    公开(公告)号:US08511170B2

    公开(公告)日:2013-08-20

    申请号:US12949356

    申请日:2010-11-18

    IPC分类号: G01L9/06

    CPC分类号: G01L9/0054 G01L19/069

    摘要: A pressure transducer includes a substrate, a piezoresistive element, a first conductive element, a first terminal, and a test structure. The substrate has a surface and a cavity. A diaphragm layer is formed over the cavity and over the surface of the substrate. The piezoresistive element is formed in the diaphragm layer. The first conductive element is formed in the diaphragm layer, and has a first conductivity type. The first conductive element is coupled to the piezoresistive element. The first terminal is formed over a surface of the diaphragm layer and coupled to the first conductive element. The test structure has the first conductivity type and is formed in the diaphragm layer. The test structure has an edge spaced apart from an edge of the first conductive element by a predetermined distance. A surface charge accumulation on the diaphragm layer is detected using the test structure.

    摘要翻译: 压力传感器包括衬底,压阻元件,第一导电元件,第一端子和测试结构。 衬底具有表面和空腔。 在空腔上方和衬底的表面上形成隔膜层。 压电元件形成在隔膜层中。 第一导电元件形成在隔膜层中,并且具有第一导电类型。 第一导电元件耦合到压阻元件。 第一端子形成在隔膜层的表面上并且耦合到第一导电元件。 测试结构具有第一导电类型并形成在隔膜层中。 测试结构具有与第一导电元件的边缘间隔开预定距离的边缘。 使用测试结构来检测隔膜层上的表面电荷积聚。

    PRESSURE TRANSDUCER HAVING STRUCTURE FOR MONITORING SURFACE CHARGE
    2.
    发明申请
    PRESSURE TRANSDUCER HAVING STRUCTURE FOR MONITORING SURFACE CHARGE 有权
    具有结构的压力传感器用于监测表面电荷

    公开(公告)号:US20120125113A1

    公开(公告)日:2012-05-24

    申请号:US12949356

    申请日:2010-11-18

    IPC分类号: G01L9/06

    CPC分类号: G01L9/0054 G01L19/069

    摘要: A pressure transducer includes a substrate, a piezoresistive element, a first conductive element, a first terminal, and a test structure. The substrate has a surface and a cavity. A diaphragm layer is formed over the cavity and over the surface of the substrate. The piezoresistive element is formed in the diaphragm layer. The first conductive element is formed in the diaphragm layer, and has a first conductivity type. The first conductive element is coupled to the piezoresistive element. The first terminal is formed over a surface of the diaphragm layer and coupled to the first conductive element. The test structure has the first conductivity type and is formed in the diaphragm layer. The test structure has an edge spaced apart from an edge of the first conductive element by a predetermined distance. A surface charge accumulation on the diaphragm layer is detected using the test structure.

    摘要翻译: 压力传感器包括衬底,压阻元件,第一导电元件,第一端子和测试结构。 衬底具有表面和空腔。 在空腔上方和衬底的表面上形成隔膜层。 压电元件形成在隔膜层中。 第一导电元件形成在隔膜层中,并且具有第一导电类型。 第一导电元件耦合到压阻元件。 第一端子形成在隔膜层的表面上并且耦合到第一导电元件。 测试结构具有第一导电类型并形成在隔膜层中。 测试结构具有与第一导电元件的边缘间隔开预定距离的边缘。 使用测试结构来检测隔膜层上的表面电荷积聚。

    Systems and methods for detecting surface charge
    3.
    发明授权
    Systems and methods for detecting surface charge 有权
    用于检测表面电荷的系统和方法

    公开(公告)号:US08922227B2

    公开(公告)日:2014-12-30

    申请号:US13043075

    申请日:2011-03-08

    IPC分类号: G01R27/08 G01R29/24

    CPC分类号: G01R29/24

    摘要: Systems and methods are provided for detecting surface charge on a semiconductor substrate having a sensing arrangement formed thereon. An exemplary sensing system includes the semiconductor substrate having the sensing arrangement formed thereon, and a module coupled to the sensing arrangement. The module obtains a first voltage output from the sensing arrangement when a first voltage is applied to the semiconductor substrate, obtains a second voltage output from the sensing arrangement when a second voltage is applied to the semiconductor substrate, and detects electric charge on the surface of the semiconductor substrate based on a difference between the first voltage output and the second voltage output.

    摘要翻译: 提供了用于检测在其上形成有感测装置的半导体衬底上的表面电荷的系统和方法。 示例性感测系统包括其上形成有感测装置的半导体衬底和耦合到感测装置的模块。 当向半导体衬底施加第一电压时,模块获得从感测装置输出的第一电压,当向半导体衬底施加第二电压时获得从感测装置输出的第二电压,并且检测表面上的电荷 基于第一电压输出和第二电压输出之间的差的半导体衬底。

    SYSTEMS AND METHODS FOR DETECTING SURFACE CHARGE
    4.
    发明申请
    SYSTEMS AND METHODS FOR DETECTING SURFACE CHARGE 有权
    用于检测表面电荷的系统和方法

    公开(公告)号:US20120229153A1

    公开(公告)日:2012-09-13

    申请号:US13043075

    申请日:2011-03-08

    IPC分类号: G01R27/08 G01R27/28

    CPC分类号: G01R29/24

    摘要: Systems and methods are provided for detecting surface charge on a semiconductor substrate having a sensing arrangement formed thereon. An exemplary sensing system includes the semiconductor substrate having the sensing arrangement formed thereon, and a module coupled to the sensing arrangement. The module obtains a first voltage output from the sensing arrangement when a first voltage is applied to the semiconductor substrate, obtains a second voltage output from the sensing arrangement when a second voltage is applied to the semiconductor substrate, and detects electric charge on the surface of the semiconductor substrate based on a difference between the first voltage output and the second voltage output.

    摘要翻译: 提供了用于检测在其上形成有感测装置的半导体衬底上的表面电荷的系统和方法。 示例性感测系统包括其上形成有感测装置的半导体衬底和耦合到感测装置的模块。 当向半导体衬底施加第一电压时,模块获得从感测装置输出的第一电压,当向半导体衬底施加第二电压时获得从感测装置输出的第二电压,并且检测表面上的电荷 基于第一电压输出和第二电压输出之间的差的半导体衬底。

    MICROELECTROMECHANICAL SYSTEM DEVICES HAVING CRACK RESISTANT MEMBRANE STRUCTURES AND METHODS FOR THE FABRICATION THEREOF
    5.
    发明申请
    MICROELECTROMECHANICAL SYSTEM DEVICES HAVING CRACK RESISTANT MEMBRANE STRUCTURES AND METHODS FOR THE FABRICATION THEREOF 有权
    具有抗裂膜结构的微电子系统装置及其制造方法

    公开(公告)号:US20140210018A1

    公开(公告)日:2014-07-31

    申请号:US13753034

    申请日:2013-01-29

    IPC分类号: B81B3/00 B81C1/00

    摘要: Methods for fabricating crack resistant Microelectromechanical (MEMS) devices are provided, as are MEMS devices produced pursuant to such methods. In one embodiment, the method includes forming a sacrificial body over a substrate, producing a multi-layer membrane structure on the substrate, and removing at least a portion of the sacrificial body to form an inner cavity within the multi-layer membrane structure. The multi-layer membrane structure is produced by first forming a base membrane layer over and around the sacrificial body such that the base membrane layer has a non-planar upper surface. A predetermined thickness of the base membrane layer is then removed to impart the base membrane layer with a planar upper surface. A cap membrane layer is formed over the planar upper surface of the base membrane layer. The cap membrane layer is composed of a material having a substantially parallel grain orientation.

    摘要翻译: 提供了制造抗电微机电(MEMS)器件的方法,以及根据这些方法制造的MEMS器件。 在一个实施例中,该方法包括在衬底上形成牺牲体,在衬底上产生多层膜结构,以及去除牺牲体的至少一部分以在多层膜结构内形成内腔。 多层膜结构通过首先在牺牲体上方和周围形成基膜层使得基膜层具有非平面的上表面来制造。 然后去除预定厚度的基膜层,以使基膜层具有平坦的上表面。 在基膜层的平面上表面上形成盖膜层。 盖膜层由具有基本上平行的晶粒取向的材料构成。

    PRESSURE LEVEL ADJUSTMENT IN A CAVITY OF A SEMICONDUCTOR DIE
    7.
    发明申请
    PRESSURE LEVEL ADJUSTMENT IN A CAVITY OF A SEMICONDUCTOR DIE 审中-公开
    在半导体芯片的压力水平调整

    公开(公告)号:US20140225206A1

    公开(公告)日:2014-08-14

    申请号:US13764246

    申请日:2013-02-11

    IPC分类号: B81B7/00 B81B3/00

    摘要: A semiconductor die (20) includes a substrate (30) and microelectronic devices (22, 26) located at a surface (32) of the substrate (30). A cap (34) is coupled to the substrate (30), and the microelectronic device (22) is positioned in the cavity (24). An outgassing material structure (36) is located within a cavity (24) between the cap (34) and the substrate (30). The outgassing material structure (36) releases trapped gas (37) to increase the pressure within the cavity (24) from an initial pressure level (96) to a second pressure level (94). The cap (34) may include another cavity (28) containing another microelectronic device (26). A getter material (42) may be located within the cavity (28). The getter material (42) is activated to absorb residual gas (46) in the cavity (28) and decrease the pressure within the cavity (28) from the initial pressure level (96) to a third pressure level (92).

    摘要翻译: 半导体管芯(20)包括位于衬底(30)的表面(32)处的衬底(30)和微电子器件(22,26)。 盖(34)耦合到基板(30),并且微电子器件(22)定位在空腔(24)中。 排气材料结构(36)位于盖(34)和基板(30)之间的空腔(24)内。 排气材料结构(36)释放截留的气体(37)以将空腔(24)内的压力从初始压力水平(96)增加到第二压力水平(94)。 盖(34)可以包括另一个包含另一微电子装置(26)的空腔(28)。 吸气材料(42)可以位于空腔(28)内。 吸气剂材料(42)被激活以吸收空腔(28)中的残余气体(46)并将空腔(28)内的压力从初始压力水平(96)降低到第三压力水平(92)。

    Circuit and method for pressure sensor testing
    8.
    发明授权
    Circuit and method for pressure sensor testing 有权
    用于压力传感器测试的电路和方法

    公开(公告)号:US08245562B2

    公开(公告)日:2012-08-21

    申请号:US12533644

    申请日:2009-07-31

    申请人: Chad S. Dawson

    发明人: Chad S. Dawson

    IPC分类号: G01L27/00

    CPC分类号: G01L27/007

    摘要: A method for testing a pressure sensor having a first node and a second node includes coupling the first node to a first input of an amplifier and coupling a reference voltage to a second input of the amplifier; applying a transfer function to an output of the amplifier to provide a first output voltage that is based on a difference in voltage between the first node and the reference voltage; coupling the reference voltage to the first input and coupling the second node to the second input; obtaining a second output voltage at the output of the amplifier; and determining, based on the first and second output voltages, whether the pressure sensor passed or failed. During normal operation, the first node is coupled to the first input and the second node to the second input, and a second transfer function is applied to the output of the amplifier.

    摘要翻译: 一种用于测试具有第一节点和第二节点的压力传感器的方法包括:将所述第一节点耦合到放大器的第一输入端并将参考电压耦合到所述放大器的第二输入; 对放大器的输出施加传递函数以提供基于第一节点和参考电压之间的电压差的第一输出电压; 将参考电压耦合到第一输入并将第二节点耦合到第二输入端; 在放大器的输出处获得第二输出电压; 以及基于所述第一和第二输出电压确定所述压力传感器是通过还是失败。 在正常操作期间,第一节点耦合到第一输入端,第二节点耦合到第二输入端,第二传递函数被施加到放大器的输出。

    INHIBITING PROPAGATION OF SURFACE CRACKS IN A MEMS DEVICE
    10.
    发明申请
    INHIBITING PROPAGATION OF SURFACE CRACKS IN A MEMS DEVICE 有权
    抑制MEMS器件中表面裂纹的传播

    公开(公告)号:US20140287547A1

    公开(公告)日:2014-09-25

    申请号:US13848819

    申请日:2013-03-22

    申请人: Chad S. Dawson

    发明人: Chad S. Dawson

    IPC分类号: B81C1/00

    摘要: A microelectromechanical systems (MEMS) device (58) includes a structural layer (78) having a top surface (86). The top surface (86) includes surface regions (92, 94) that are generally parallel to one another but are offset relative to one another such that a stress concentration location (90) is formed between them. Laterally propagating shallow surface cracks (44) have a tendency to form in the structural layer (78), especially near the joints (102) between the surface regions (92, 94). A method (50) entails fabricating (52) the MEMS device (58) and forming (54) trenches (56) in the top surface (86) of the structural layer (78) of the MEMS device (58). The trenches (56) act as a crack inhibition feature to largely prevent the formation of deep cracks in structural layer (78) which might otherwise result in MEMS device failure.

    摘要翻译: 微机电系统(MEMS)装置(58)包括具有顶表面(86)的结构层(78)。 顶表面(86)包括通常彼此平行但相对于彼此偏移的表面区域(92,94),使得在它们之间形成应力集中位置(90)。 横向传播的浅表面裂纹(44)在结构层(78)中尤其是在表面区域(92,94)之间的接头(102)附近形成倾向。 方法(50)需要在MEMS装置(58)的结构层(78)的顶表面(86)中制造(52)MEMS器件(58)并形成(54)沟槽(56)。 沟槽(56)用作裂纹抑制特征,以大大地防止在结构层(78)中形成深裂纹,否则可能导致MEMS器件失效。