公开(公告)号：US10152111B2

公开(公告)日：2018-12-11

申请号：US15728453

申请日：2017-10-09

Applicant: Linear Technology Corporation

Inventor： Brett Warneke ,  Maxim Moiseev

IPC: G06F1/32 ,  G06F1/12 ,  G06F9/44 ,  H03L5/02 ,  H03L7/18 ,  H04W52/02 ,  H04B1/00 ,  G06F9/445 ,  G06F1/14

Abstract: A network device includes a network interface circuit, a microprocessor, a timing circuit, and a microsequencer. The timing circuit is configured to, based on a primary timing signal, generate a time signature and switch the network device from an inactive state to an active state when the time signature satisfies a predetermined threshold length of time for packet transmission. The microsequencer circuit is configured to, in response to the network device being switched to the active state, activate and configure the network interface circuit for the packet transmission, independent of the microprocessor and delays encountered by the microprocessor. The device also reduces energy consumption by using a lower frequency secondary oscillator to maintain timing information when a higher frequency primary oscillator is inactivated.