Computer platform memory access control method and system with memory configuration automatic setting capability
    1.
    发明授权
    Computer platform memory access control method and system with memory configuration automatic setting capability 有权
    计算机平台内存访问控制方法和系统具有内存配置自动设置功能

    公开(公告)号:US07360052B2

    公开(公告)日:2008-04-15

    申请号:US11233204

    申请日:2005-09-21

    IPC分类号: G06F12/00

    CPC分类号: G06F12/0646

    摘要: A computer platform memory access control method and system is proposed, which is designed for use with a computer platform, such as a network server, for providing the server with a memory access control function with a memory configuration automatic setting capability, which is characterized by the arrangement of a configuration data exchange path between a memory control chip and an I/O control chip on the server's motherboard, so as to allow a set of memory specification data stored in an I/O configuration register of the ICH I/O control chip to be mapped via the configuration data exchange path to a memory configuration register of the memory control chip, such that a memory access action can be performed based on the memory specification data mapped from the I/O control chip. This feature allows the operation and network management of servers to be made more efficient.

    摘要翻译: 提出了一种计算机平台存储器访问控制方法和系统,其被设计为与诸如网络服务器的计算机平台一起使用,为服务器提供具有存储器配置自动设置能力的存储器访问控制功能,其特征在于 在服务器主板上的存储器控​​制芯片和I / O控制芯片之间的配置数据交换路径的布置,以便允许存储在ICH I / O控制的I / O配置寄存器中的一组存储器指定数据 芯片通过配置数据交换路径映射到存储器控制芯片的存储器配置寄存器,使得可以基于从I / O控制芯片映射的存储器指定数据执行存储器访问动作。 该功能使服务器的运行和网络管理更加高效。

    Computer platform memory access control method and system with memory configuration automatic setting capability
    2.
    发明申请
    Computer platform memory access control method and system with memory configuration automatic setting capability 有权
    计算机平台内存访问控制方法和系统具有内存配置自动设置功能

    公开(公告)号:US20070067596A1

    公开(公告)日:2007-03-22

    申请号:US11233204

    申请日:2005-09-21

    IPC分类号: G06F12/00

    CPC分类号: G06F12/0646

    摘要: A computer platform memory access control method and system is proposed, which is designed for use with a computer platform, such as a network server, for providing the server with a memory access control function with a memory configuration automatic setting capability, which is characterized by the arrangement of a configuration data exchange path between a memory control chip and an I/O control chip on the server's motherboard, so as to allow a set of memory specification data stored in an I/O configuration register of the ICH I/O control chip to be mapped via the configuration data exchange path to a memory configuration register of the memory control chip, such that a memory access action can be performed based on the memory specification data mapped from the I/O control chip. This feature allows the operation and network management of servers to be made more efficient.

    摘要翻译: 提出了一种计算机平台存储器访问控制方法和系统,其被设计为与诸如网络服务器的计算机平台一起使用,为服务器提供具有存储器配置自动设置能力的存储器访问控制功能,其特征在于 在服务器主板上的存储器控​​制芯片和I / O控制芯片之间的配置数据交换路径的布置,以便允许存储在ICH I / O控制的I / O配置寄存器中的一组存储器指定数据 芯片通过配置数据交换路径映射到存储器控制芯片的存储器配置寄存器,使得可以基于从I / O控制芯片映射的存储器指定数据执行存储器访问动作。 该功能使服务器的运行和网络管理更加高效。

    Optimized peripheral device configuration data sequential handling method and system for computer platform
    3.
    发明授权
    Optimized peripheral device configuration data sequential handling method and system for computer platform 失效
    优化外围设备配置数据顺序处理方法和计算机平台系统

    公开(公告)号:US07480743B2

    公开(公告)日:2009-01-20

    申请号:US11378658

    申请日:2006-03-15

    IPC分类号: G06F3/00

    CPC分类号: G06F9/4411

    摘要: An optimized peripheral device configuration data sequential handling method and system is proposed, which is designed for use with a computer platform for providing the computer platform an optimized configuration data sequential handling function, which is characterized by the capability of performing a runtime data amount computing procedure for each set of the OPROM-embedded original configuration data from each connected peripheral device, such that an optimal handling sequence can be determined based on the runtime data amount for the handling of the configuration data in shadow RAM during initialization. This feature allows a shadow RAM unit having a limited capacity to support more peripheral devices at the same time, and also allows the utilization of the storage space of a shadow RAM to be more flexible and efficient.

    摘要翻译: 提出了一种优化的外围设备配置数据顺序处理方法和系统,其被设计用于与计算机平台一起使用以向计算机平台提供优化的配置数据顺序处理功能,其特征在于执行运行时数据量计算过程 对于来自每个连接的外围设备的每组OPROM嵌入的原始配置数据,使得可以基于用于在初始化期间处理影子RAM中的配置数据的运行时数据量来确定最佳处理顺序。 该特征允许具有有限容量的影子RAM单元同时支持更多外围设备,并且还允许利用影子RAM的存储空间更灵活和高效。

    Method for protecting data in a hard disk
    4.
    发明授权
    Method for protecting data in a hard disk 有权
    保护硬盘中数据的方法

    公开(公告)号:US07743424B2

    公开(公告)日:2010-06-22

    申请号:US11709216

    申请日:2007-02-22

    IPC分类号: H04L9/32

    CPC分类号: G06F12/1433

    摘要: The present invention discloses a method for protecting data in a hard disk, such that when a computer executes a power-on self test (POST) of a basic input/output system (BIOS), completes initialization of memories and calls an interrupt routine of the BIOS to read a hard disk area after initialization program codes of interface devices of all hard disk are executed, the computer will determine whether or not the hard disk has added a protection description data with a portion that matches with a computer identification code of the computer before accessing data in the hard disk.

    摘要翻译: 本发明公开了一种用于保护硬盘中的数据的方法,使得当计算机执行基本输入/输出系统(BIOS)的通电自检(POST)时,完成存储器的初始化并调用中断程序 在执行所有硬盘的接口设备的初始化程序代码之后,BIOS读取硬盘区域,计算机将确定硬盘是否已经添加了与计算机识别码匹配的部分的保护描述数据 计算机在访问硬盘中的数据之前。

    Optimized peripheral device configuration data sequential handling method and system for computer platform
    5.
    发明申请
    Optimized peripheral device configuration data sequential handling method and system for computer platform 失效
    优化外围设备配置数据顺序处理方法和计算机平台系统

    公开(公告)号:US20070220180A1

    公开(公告)日:2007-09-20

    申请号:US11378658

    申请日:2006-03-15

    IPC分类号: G06F3/00

    CPC分类号: G06F9/4411

    摘要: An optimized peripheral device configuration data sequential handling method and system is proposed, which is designed for use with a computer platform for providing the computer platform an optimized configuration data sequential handling function, which is characterized by the capability of performing a runtime data amount computing procedure for each set of the OPROM-embedded original configuration data from each connected peripheral device, such that an optimal handling sequence can be determined based on the runtime data amount for the handling of the configuration data in shadow RAM during initialization. This feature allows a shadow RAM unit having a limited capacity to support more peripheral devices at the same time, and also allows the utilization of the storage space of a shadow RAM to be more flexible and efficient.

    摘要翻译: 提出了一种优化的外围设备配置数据顺序处理方法和系统,其被设计用于与计算机平台一起使用以向计算机平台提供优化的配置数据顺序处理功能,其特征在于执行运行时数据量计算过程 对于来自每个连接的外围设备的每组OPROM嵌入的原始配置数据,使得可以基于用于在初始化期间处理影子RAM中的配置数据的运行时数据量来确定最佳处理顺序。 该特征允许具有有限容量的影子RAM单元同时支持更多外围设备,并且还允许利用影子RAM的存储空间更灵活和高效。

    Heat dissipating method
    6.
    发明授权

    公开(公告)号:US07152013B2

    公开(公告)日:2006-12-19

    申请号:US11053571

    申请日:2005-02-07

    CPC分类号: G05D23/1917

    摘要: A heat dissipating method is applied to a computer system having a timing signaling mechanism and a temperature sensing unit. Firstly, a process of setting a dissipating temperature operating mode is performed. Then, a periodic signal is regularly transmitted to a basic input output system by the timing signaling mechanism of the computer system, and a temperature of each of hardware devices is regularly sensed by the temperature sensing unit. Subsequently, a heat dissipating unit of each of the hardware devices is actuated to perform a heat dissipation process according to the temperature sensed by the temperature sensing unit and the dissipating temperature operating mode. Therefore, the present invention can control operating intensity of the heat dissipating units and achieve hardware monitoring without requiring additional software or hardware, such that heat dissipating and operation efficiencies of the hardware devices of the computer system can be improved.

    Memory reliability detection system and method
    7.
    发明申请
    Memory reliability detection system and method 审中-公开
    内存可靠性检测系统及方法

    公开(公告)号:US20060206764A1

    公开(公告)日:2006-09-14

    申请号:US11080865

    申请日:2005-03-11

    IPC分类号: G06F11/00

    摘要: A memory reliability detection system and a memory reliability detection method are applied in a computer device to perform a detection process on a motherboard according to a basic input/output system (BIOS) program during power-on of the computer device, so as to allow the computer device to successfully enter an operating system and steadily operate as well as perform an initialization procedure according to the BIOS program. The computer device is allowed to read a parameter of a dual in-line memory module (DIMM) on the motherboard to perform the detection process. If a detection result does not satisfy a predetermined requirement, the DIMM is problematic and recorded in a storage unit, such that the computer device can identify and ignore the problematic DIMM according to the record after power-on, thereby preventing an influence on operation stability of the computer device due to reading the problematic DIMM during operation.

    摘要翻译: 在计算机装置中应用存储器可靠性检测系统和存储器可靠性检测方法,以在计算机装置通电期间根据基本输入/输出系统(BIOS)程序在母板上执行检测处理,以允许 计算机设备成功进入操作系统并稳定运行,并根据BIOS程序执行初始化过程。 允许计算机设备读取主板上的双列直插式存储器模块(DIMM)的参数,以执行检测过程。 如果检测结果不满足规定的要求,则DIMM存在问题并记录在存储单元中,使得计算机装置可根据上电后的记录识别并忽略有问题的DIMM,从而防止对操作稳定性的影响 由于在操作期间读取有问题的DIMM,计算机设备。

    Method of integrating image and release note of BIOS
    8.
    发明申请
    Method of integrating image and release note of BIOS 审中-公开
    集成BIOS的图像和发行说明的方法

    公开(公告)号:US20080077783A1

    公开(公告)日:2008-03-27

    申请号:US11526580

    申请日:2006-09-26

    IPC分类号: G06F15/177

    CPC分类号: G06F9/4401 G06F8/71

    摘要: In a method of integrating image and release note of BIOS, a memory space such as flash ROM used for storing machine codes of the BIOS is planned at least one independent block with a specific length, and each block is used for storing a release note of the BIOS. All release notes of the BIOS are compiled into at least one independent binary module, and the binary module is compressed according to actual requirements. In the process of building the BIOS, the compressed binary module is placed in the image of the BIOS, and the image of the BIOS is written into each block. When a setup utility of the BIOS is executed, all release notes of the BIOS can be displayed through an output device, so that a user can select and search a related item of each release note through an input device such as a keyboard.

    摘要翻译: 在集成BIOS的图像和释放笔记的方法中,计划用于存储BIOS的机器代码的闪存ROM的存储器空间,具有特定长度的至少一个独立块,并且每个块用于存储 BIOS。 BIOS的所有发行说明都编译成至少一个独立的二进制模块,二进制模块根据实际要求进行压缩。 在构建BIOS的过程中,将压缩的二进制模块放置在BIOS的图像中,并将BIOS的映像写入每个块。 当执行BIOS的设置实用程序时,可以通过输出设备显示BIOS的所有发行说明,使得用户可以通过诸如键盘的输入设备来选择和搜索每个发行说明的相关项目。

    Computer platform automatic testing method and system
    9.
    发明授权
    Computer platform automatic testing method and system 有权
    电脑平台自动测试方法及系统

    公开(公告)号:US07308376B2

    公开(公告)日:2007-12-11

    申请号:US11051898

    申请日:2005-02-05

    IPC分类号: G01R27/28

    CPC分类号: G06F11/263

    摘要: A computer platform automatic testing method and system is proposed, which is designed for use in conjunction with a computer platform for performing an automatic testing procedure on a computer-dedicated circuit unit installed on the computer platform, and which is characterized by the capability of performing an automatic testing procedure on a computer-dedicated circuit unit based on a user-specified set of hardware specification data about the computer platform and circuit unit under test, and the capability of automatically generating a test report that lists related data about each faulted part of the circuit unit being tested. This feature allows hardware engineers to more conveniently and efficiently correct faulted parts in the circuit unit being tested.

    摘要翻译: 提出了一种计算机平台自动测试方法和系统,其设计用于与计算机平台结合使用,用于在安装在计算机平台上的计算机专用电路单元上执行自动测试程序,其特征在于执行能力 基于用户指定的关于被测试的计算机平台和电路单元的硬件规格数据集的计算机专用电路单元的自动测试程序,以及自动生成测试报告的能力,该测试报告列出关于每个故障部分的相关数据 电路单元被测试。 该功能允许硬件工程师更方便,更有效地纠正正在测试的电路单元中的故障部件。

    Initialization picture displaying method
    10.
    发明申请
    Initialization picture displaying method 审中-公开
    初始化图像显示方法

    公开(公告)号:US20070233815A1

    公开(公告)日:2007-10-04

    申请号:US11395845

    申请日:2006-03-30

    IPC分类号: G06F15/16

    CPC分类号: H04N21/24

    摘要: An initialization picture displaying method is applicable to a server such as a network-attached storage (NAS) server without a display chip for remotely displaying working messages of the server. The initialization picture displaying method includes (1) utilizing a chipset to reserve a region of a memory as a display chip buffer, (2) initializing an option ROM completely, and (3) after the option ROM is initialized completely releasing the reserved region of the memory. Therefore, even if the server does not have any display chip, the NAS sever can still correctly remotely display an initialization picture of an option ROM.

    摘要翻译: 初始化图像显示方法可应用于诸如具有用于远程显示服务器的工作消息的显示芯片的网络连接存储(NAS)服务器的服务器。 初始化图像显示方法包括:(1)使用芯片组来保留存储器的区域作为显示芯片缓冲器,(2)完全初始化选项ROM,以及(3)在选项ROM初始化完全释放之后, 记忆。 因此,即使服务器没有任何显示芯片,NAS服务器仍然可以正确远程显示选项ROM的初始化画面。