公开(公告)号：US20180130624A1

公开(公告)日：2018-05-10

申请号：US15866804

申请日：2018-01-10

Applicant: Littelfuse, Inc.

Inventor： Wen Yang ,  Hailang Tang ,  Huawei Yin ,  Stephen J. Whitney ,  G. Todd Dietsch

IPC: H01H37/60 ,  H02H9/04

CPC classification number: H01H37/60 ,  H01C7/12 ,  H01H2085/0486 ,  H01H2223/044 ,  H02H9/041

Abstract: A circuit protection device including a housing defining a chamber and a metal oxide varistor (MOV) stack disposed within the chamber. A first spring is electrically attached at a first end to a first input terminal of the MOV stack by a solder connection and at a second end to a first input line. The first spring is biased away from the first input terminal. A second spring is electrically attached to a second input terminal of the MOV stack by a solder connection and at a second end to a second input line. The second conductive spring is biased away from the second input terminal. When an overvoltage condition occurs, heat generated by the MOV stack melts at least one of the first or second solder connections to allow the corresponding springs to be displaced away from the respective MOV stack input terminals, thereby creating an opening circuit.

公开(公告)号：US11508542B2

公开(公告)日：2022-11-22

申请号：US17530008

申请日：2021-11-18

Applicant: Littelfuse, Inc.

Inventor： Irma Valeriano Santos ,  G. Todd Dietsch

IPC: H01H85/17 ,  H01H69/02 ,  H01H85/041 ,  H01H85/06 ,  H01H85/165

Abstract: A high breaking capacity chip fuse including a bottom insulative layer, a first intermediate insulative layer, a second intermediate insulative layer, and a top insulative layer disposed in a stacked arrangement in the aforementioned order, a fusible element disposed between the first and second intermediate insulative layers and extending between electrically conductive first and second terminals at opposing longitudinal ends of the bottom insulative layer, the first intermediate insulative layer, the second intermediate insulative layer, and the top insulative layer, wherein the first and second intermediate insulative layers are formed of porous ceramic.

公开(公告)号：US20220076913A1

公开(公告)日：2022-03-10

申请号：US17530008

申请日：2021-11-18

Applicant: Littelfuse, Inc.

Inventor： Irma Valeriano Santos ,  G. Todd Dietsch

IPC: H01H85/17 ,  H01H85/041 ,  H01H85/06

Abstract: A high breaking capacity chip fuse including a bottom insulative layer, a first intermediate insulative layer, a second intermediate insulative layer, and a top insulative layer disposed in a stacked arrangement in the aforementioned order, a fusible element disposed between the first and second intermediate insulative layers and extending between electrically conductive first and second terminals at opposing longitudinal ends of the bottom insulative layer, the first intermediate insulative layer, the second intermediate insulative layer, and the top insulative layer, wherein the first and second intermediate insulative layers are formed of porous ceramic.

公开(公告)号：US11217415B2

公开(公告)日：2022-01-04

申请号：US17023601

申请日：2020-09-17

Applicant: Littelfuse, Inc.

Inventor： Irma Valeriano Santos ,  G. Todd Dietsch

IPC: H01H85/17 ,  H01H85/041 ,  H01H85/06 ,  H01H85/165

Abstract: A high breaking capacity chip fuse including a bottom insulative layer, a first intermediate insulative layer, a second intermediate insulative layer, and a top insulative layer disposed in a stacked arrangement in the aforementioned order, a fusible element disposed between the first and second intermediate insulative layers and extending between electrically conductive first and second terminals at opposing longitudinal ends of the bottom insulative layer, the first intermediate insulative layer, the second intermediate insulative layer, and the top insulative layer, wherein the first and second intermediate insulative layers are formed of porous ceramic.

公开(公告)号：US20210090839A1

公开(公告)日：2021-03-25

申请号：US17023601

申请日：2020-09-17

Applicant: Littelfuse, Inc.

Inventor： Irma Valeriano Santos ,  G. Todd Dietsch

IPC: H01H85/18 ,  H01H85/041 ,  H01H85/06

Abstract: A high breaking capacity chip fuse including a bottom insulative layer, a first intermediate insulative layer, a second intermediate insulative layer, and a top insulative layer disposed in a stacked arrangement in the aforementioned order, a fusible element disposed between the first and second intermediate insulative layers and extending between electrically conductive first and second terminals at opposing longitudinal ends of the bottom insulative layer, the first intermediate insulative layer, the second intermediate insulative layer, and the top insulative layer, wherein the first and second intermediate insulative layers are formed of porous ceramic.

公开(公告)号：US10325739B2

公开(公告)日：2019-06-18

申请号：US15866804

申请日：2018-01-10

Applicant: Littelfuse, Inc.

Inventor： Wen Yang ,  Hailang Tang ,  Huawei Yin ,  Stephen J. Whitney ,  G. Todd Dietsch

IPC: H01H37/60 ,  H02H9/04 ,  H01C7/12 ,  H01H85/048

Abstract: A circuit protection device including a housing defining a chamber and a metal oxide varistor (MOV) stack disposed within the chamber. A first spring is electrically attached at a first end to a first input terminal of the MOV stack by a solder connection and at a second end to a first input line. The first spring is biased away from the first input terminal. A second spring is electrically attached to a second input terminal of the MOV stack by a solder connection and at a second end to a second input line. The second conductive spring is biased away from the second input terminal. When an overvoltage condition occurs, heat generated by the MOV stack melts at least one of the first or second solder connections to allow the corresponding springs to be displaced away from the respective MOV stack input terminals.

公开(公告)号：US20150228429A1

公开(公告)日：2015-08-13

申请号：US14394143

申请日：2012-10-26

Applicant: LITTELFUSE, INC.

Inventor： Wen Yang ,  Hailang Tang ,  Huawei Yin ,  Stephen J. Whitney ,  G. Todd Dietsch

IPC: H01H37/60 ,  H01C7/12

CPC classification number: H01H37/60 ,  H01C7/12 ,  H01H2085/0486 ,  H01H2223/044 ,  H02H9/041

Abstract: A circuit protection device including a housing (15) defining a chamber (19) and a metal oxide varistor (MOV) stack (310) disposed within the chamber (19). A first spring (330a) is electrically attached at a first end to a first input terminal (311a) of the MOV stack (310) by a solder connection (30) and at a second end to a first input line (20a). The first spring (330a) is biased away from the first input terminal (311a). A second spring (330b) is electrically attached to a second input terminal (311b) of the MOV stack (310) by a solder connection (40) and at a second end to a second input line (20b). The second conductive spring (330b) is biased away from the second input terminal (311b). When an overvoltage condition occurs, heat generated by the MOV stack (310) melts at least one of the first or second solder connections (30, 40) to allow the corresponding springs to be displaced away from the respective MOV stack (310) input terminals (311 a, 311 b), thereby creating an opening circuit.

Abstract translation: 一种电路保护装置，包括限定室（19）的壳体（15）和设置在室（19）内的金属氧化物变阻器（MOV）堆叠（310）。 第一弹簧（330a）在第一端处通过焊料连接（30）电连接到MOV堆叠（310）的第一输入端子（311a），并在第二端电连接到第一输入线（20a）。 第一弹簧（330a）偏离第一输入端子（311a）。 第二弹簧（330b）通过焊接连接（40）电连接到MOV堆叠（310）的第二输入端子（311b），并在第二端电连接到第二输入线（20b）。 第二导电弹簧（330b）偏离第二输入端子（311b）。 当发生过电压状态时，由MOV堆（310）产生的热会熔化至少一个第一或第二焊料连接（30,40），以使相应的弹簧能够远离相应的MOV堆（310）输入端 （311a，311b），从而形成开路电路。