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    Design structure for on-chip electromigration monitoring system
    1.
    发明申请
    Design structure for on-chip electromigration monitoring system 有权
    片上电迁移监控系统的设计结构

    公开(公告)号：US20090132985A1

    公开(公告)日：2009-05-21

    申请号：US11985966

    申请日：2007-11-19

    申请人： Louis L. Hsu ,  Hayden C. Cranford, JR. ,  Oleg Gluschenkov ,  James S. Mason ,  Michael A. Sorna ,  Chih-Chao Yang

    发明人： Louis L. Hsu ,  Hayden C. Cranford, JR. ,  Oleg Gluschenkov ,  James S. Mason ,  Michael A. Sorna ,  Chih-Chao Yang

    IPC分类号： G06F17/50

    CPC分类号： G06F17/5036 ,  G01R31/2858

    摘要： A design structure embodied in a machine readable medium used in a design process can include apparatus of a semiconductor chip operable to detect an increase in resistance of a monitored element of the semiconductor chip. The design structure can include, for example, a resistive voltage divider circuit operable to output a plurality of reference voltages having different values. A plurality of comparators in the semiconductor chip may be coupled to receive the reference voltages and a monitored voltage representative of a resistance of the monitored element. Each of the comparators may produce an output indicating whether the monitored voltage exceeds the reference voltages, so that the resistance value of the monitored element may be precisely determined.

    摘要翻译： 体现在设计过程中使用的机器可读介质中的设计结构可以包括半导体芯片的装置，其可操作以检测半导体芯片的被监测元件的电阻的增加。 该设计结构可以包括例如可操作以输出具有不同值的多个参考电压的电阻分压器电路。 可以将半导体芯片中的多个比较器耦合以接收参考电压和表示所监视元件的电阻的监视电压。 每个比较器可以产生指示监视的电压是否超过参考电压的输出，使得可以精确地确定被监视元件的电阻值。

    On-chip electromigration monitoring
    2.
    发明申请
    On-chip electromigration monitoring 有权
    片上电迁移监测

    公开(公告)号：US20080265931A1

    公开(公告)日：2008-10-30

    申请号：US12215732

    申请日：2008-06-30

    申请人： Louis L. Hsu ,  Hayden C. Cranford ,  Oleg Gluschenkov ,  James S. Mason ,  Michael A. Sorna ,  Chih-Chao Yang

    发明人： Louis L. Hsu ,  Hayden C. Cranford ,  Oleg Gluschenkov ,  James S. Mason ,  Michael A. Sorna ,  Chih-Chao Yang

    IPC分类号： G01R31/26

    CPC分类号： G01R31/2858 ,  G01R31/2884 ,  G01R31/318533

    摘要： A method is provided for monitoring interconnect resistance within a semiconductor chip assembly. A semiconductor chip assembly can include a semiconductor chip having contacts exposed at a surface of the semiconductor chip and a substrate having exposed terminals in conductive communication with the contacts. A plurality of monitored elements of the semiconductor chip can include conductive interconnects, each interconnecting a respective pair of nodes of the semiconductor chip through wiring within the semiconductor chip. In an example of such method, a voltage drop across each monitored element is compared with a reference voltage drop across a respective reference element on the semiconductor chip at a plurality of different times during a lifetime of the semiconductor chip assembly. In that way, it can be detected when a resistance of such monitored element is over threshold. Based on a result of such comparison, a decision can be made whether to indicate an action condition.

    摘要翻译： 提供了一种用于监测半导体芯片组件内的互连电阻的方法。 半导体芯片组件可以包括具有暴露在半导体芯片的表面处的触点的半导体芯片和具有与触点导电连通的暴露端子的基板。 半导体芯片的多个受监测元件可以包括导电互连，每个导体互连通过半导体芯片内的布线互连半导体芯片的相应的一对节点。 在这种方法的示例中，在半导体芯片组件的寿命期间，跨越每个被监测元件的电压降与在半导体芯片上的相应参考元件上的参考电压降在多个不同时间进行比较。 以这种方式，当这种被监视的元件的电阻超过阈值时，可以检测它。 基于这种比较的结果，可以做出是否指示动作条件的决定。

    On-chip electromigration monitoring system
    3.
    发明授权
    On-chip electromigration monitoring system 有权
    片上电迁移监控系统

    公开(公告)号：US07394273B2

    公开(公告)日：2008-07-01

    申请号：US11306985

    申请日：2006-01-18

    申请人： Louis L. Hsu ,  Hayden C. Cranford, Jr. ,  Oleg Gluschenkov ,  James S. Mason ,  Michael A. Sorna ,  Chih-Chao Yang

    发明人： Louis L. Hsu ,  Hayden C. Cranford, Jr. ,  Oleg Gluschenkov ,  James S. Mason ,  Michael A. Sorna ,  Chih-Chao Yang

    IPC分类号： G01R31/02

    CPC分类号： G01R31/2858 ,  G01R31/2884 ,  G01R31/318533

    摘要： A packaged semiconductor chip is provided which includes a semiconductor chip and a package element. The semiconductor chip includes a plurality of semiconductor devices and a plurality of conductive features disposed at an exterior face of the semiconductor chip. The package element has a plurality of external features conductively connected to the plurality of conductive features of the semiconductor chip. The semiconductor chip includes a monitored element including a conductive interconnect that conductively interconnects a first node of the semiconductor chip to a second node of the semiconductor chip. A detection circuit in the semiconductor chip is operable to compare a variable voltage drop across the monitored element with a reference voltage drop across a reference element on the chip at a plurality of different times during a lifetime of the packaged semiconductor chip so as to detect when the resistance of the monitored element is over threshold.

    摘要翻译： 提供一种封装的半导体芯片，其包括半导体芯片和封装元件。 半导体芯片包括多个半导体器件和设置在半导体芯片的外表面处的多个导电特征。 封装元件具有导电连接到半导体芯片的多个导电特征的多个外部特征。 半导体芯片包括被监视的元件，该元件包括将半导体芯片的第一节点与半导体芯片的第二节点导电互连的导电互连。 半导体芯片中的检测电路可操作以在封装的半导体芯片的寿命期间的多个不同时间将所监视的元件上的可变电压降与芯片上的参考元件上的参考电压降进行比较，以便检测何时 被监测元件的电阻超过阈值。

    Structure for on-chip electromigration monitoring system
    4.
    发明授权
    Structure for on-chip electromigration monitoring system 有权
    片上电迁移监控系统结构

    公开(公告)号：US07840916B2

    公开(公告)日：2010-11-23

    申请号：US11985966

    申请日：2007-11-19

    申请人： Louis L. Hsu ,  Hayden C. Cranford, Jr. ,  Oleg Gluschenkov ,  James S. Mason ,  Michael A. Sorna ,  Chih-Chao Yang

    发明人： Louis L. Hsu ,  Hayden C. Cranford, Jr. ,  Oleg Gluschenkov ,  James S. Mason ,  Michael A. Sorna ,  Chih-Chao Yang

    IPC分类号： G06F17/50

    CPC分类号： G06F17/5036 ,  G01R31/2858

    摘要： A design structure embodied in a machine readable medium used in a design process can include apparatus of a semiconductor chip operable to detect an increase in resistance of a monitored element of the semiconductor chip. The design structure can include, for example, a resistive voltage divider circuit operable to output a plurality of reference voltages having different values. A plurality of comparators in the semiconductor chip may be coupled to receive the reference voltages and a monitored voltage representative of a resistance of the monitored element. Each of the comparators may produce an output indicating whether the monitored voltage exceeds the reference voltages, so that the resistance value of the monitored element may be precisely determined.

    摘要翻译： 体现在设计过程中使用的机器可读介质中的设计结构可以包括半导体芯片的装置，其可操作以检测半导体芯片的被监测元件的电阻的增加。 该设计结构可以包括例如可操作以输出具有不同值的多个参考电压的电阻分压器电路。 可以将半导体芯片中的多个比较器耦合以接收参考电压和表示所监视元件的电阻的监视电压。 每个比较器可以产生指示监视的电压是否超过参考电压的输出，使得可以精确地确定被监视元件的电阻值。

    On-chip electromigration monitoring
    5.
    发明授权
    On-chip electromigration monitoring 有权
    片上电迁移监测

    公开(公告)号：US07719302B2

    公开(公告)日：2010-05-18

    申请号：US12215732

    申请日：2008-06-30

    申请人： Louis L. Hsu ,  Hayden C. Cranford, Jr. ,  Oleg Gluschenkov ,  James S. Mason ,  Michael A. Sorna ,  Chih-Chao Yang

    发明人： Louis L. Hsu ,  Hayden C. Cranford, Jr. ,  Oleg Gluschenkov ,  James S. Mason ,  Michael A. Sorna ,  Chih-Chao Yang

    IPC分类号： G01R31/02

    CPC分类号： G01R31/2858 ,  G01R31/2884 ,  G01R31/318533

    摘要： A method is provided for monitoring interconnect resistance within a semiconductor chip assembly, A semiconductor chip assembly can include a semiconductor chip having contacts exposed at a surface of the semiconductor chip and a substrate having exposed terminals in conductive communication with the contacts. A plurality of monitored elements of the semiconductor chip can include conductive interconnects, each interconnecting a respective pair of nodes of the semiconductor chip through wiring within the semiconductor chip. In an example of such method, a voltage drop across each monitored element is compared with a reference voltage drop across a respective reference element on the semiconductor chip at a plurality of different times during a lifetime of the semiconductor chip assembly. In that way, it can be detected when a resistance of such monitored element is over threshold. Based on a result of such comparison, a decision can be made whether to indicate an action condition.

    摘要翻译： 提供了一种用于监测半导体芯片组件内的互连电阻的方法。半导体芯片组件可以包括具有在半导体芯片的表面处露出的触点的半导体芯片和具有与触点导电连通的露出端子的基板。 半导体芯片的多个受监测元件可以包括导电互连，每个导体互连通过半导体芯片内的布线互连半导体芯片的相应的一对节点。 在这种方法的示例中，在半导体芯片组件的寿命期间，跨越每个被监测元件的电压降与在半导体芯片上的相应参考元件上的参考电压降在多个不同时间进行比较。 以这种方式，当这种被监视的元件的电阻超过阈值时，可以检测它。 基于这种比较的结果，可以做出是否指示动作条件的决定。

    Front end interface for data receiver
    6.
    发明授权
    Front end interface for data receiver 失效
    数据接收机的前端接口

    公开(公告)号：US07519130B2

    公开(公告)日：2009-04-14

    申请号：US10905705

    申请日：2005-01-18

    申请人： Louis L. Hsu ,  Matt R. Cordrey-Gale ,  James S. Mason ,  Philip J. Murfet ,  Karl D. Selander ,  Michael A. Sorna ,  Huihao Xu

    发明人： Louis L. Hsu ,  Matt R. Cordrey-Gale ,  James S. Mason ,  Philip J. Murfet ,  Karl D. Selander ,  Michael A. Sorna ,  Huihao Xu

    IPC分类号： H04L25/34

    CPC分类号： H04L25/0274 ,  H04L25/0296

    摘要： A data receiver is provided which includes a front end interface circuit having an alternating current (AC) transmission receiving mode and a direct current (DC) transmission receiving mode. The front end interface circuit includes an offset compensation circuit operable to compensate a DC voltage offset between a pair of differential signals input to the data receiver. The front end interface circuit further includes an AC/DC selection unit operable to switch between (a) the DC transmission receiving mode, and (b) the AC transmission receiving mode, such that the data receiver is operable in (i) the DC transmission mode in which the offset compensation circuit is disabled, (ii) the DC transmission mode in which the offset compensation circuit is enabled, (iii) the AC transmission mode in which the offset compensation circuit is disabled, and (iv) the AC transmission receiving mode in which the offset compensation circuit is enabled.

    摘要翻译： 提供一种数据接收器，其包括具有交流（AC）发送接收模式和直流（DC）发送接收模式的前端接口电路。 前端接口电路包括偏移补偿电路，其可操作以补偿输入到数据接收器的一对差分信号之间的直流电压偏移。 前端接口电路还包括可操作以在（a）直流发送接收模式和（b）交流发送接收模式之间切换的AC / DC选择单元，使得数据接收器可操作于（i）直流传输 偏移补偿电路被禁用的模式，（ii）使能偏移补偿电路的直流传输模式，（iii）偏移补偿电路被禁用的AC传输模式，以及（iv）AC传输接收 偏移补偿电路使能的模式。

    Structure for transmitter bandwidth optimization circuit
    7.
    发明申请
    Structure for transmitter bandwidth optimization circuit 有权
    发射机带宽优化电路的结构

    公开(公告)号：US20090129485A1

    公开(公告)日：2009-05-21

    申请号：US11985963

    申请日：2007-11-19

    申请人： Louis L. Hsu ,  Hayden C. Cranford, JR. ,  Joseph Natonio ,  James D. Rockrohr ,  Huihao Xu ,  Steven J. Zier

    发明人： Louis L. Hsu ,  Hayden C. Cranford, JR. ,  Joseph Natonio ,  James D. Rockrohr ,  Huihao Xu ,  Steven J. Zier

    IPC分类号： H04B3/00 ,  H04L27/00

    CPC分类号： H04L25/0286 ,  H04L25/03343

    摘要： A design structure embodied in a machine-readable medium used in a design process provides a transmitter having a frequency response controllable in accordance with an operational parameter, and may include a storage operable to store operational parameters for controlling a frequency response of the transmitter under each of a plurality of corresponding operating conditions. A sensor can be used to detect an operating condition. In response to a change in the detected operating condition, a stored operational parameter corresponding to the detected operating condition can be used to control the frequency response of the transmitter.

    摘要翻译： 体现在设计过程中使用的机器可读介质中的设计结构提供具有根据操作参数可控的频率响应的发射机，并且可以包括可操作地存储用于控制每个发射机的频率响应的操作参数的存储器 的多个相应的操作条件。 可以使用传感器来检测操作状态。 响应于检测到的操作条件的变化，可以使用与检测到的操作条件对应的存储的操作参数来控制发送器的频率响应。

    Transmitter bandwidth optimization circuit
    8.
    发明授权
    Transmitter bandwidth optimization circuit 有权
    发射机带宽优化电路

    公开(公告)号：US08219040B2

    公开(公告)日：2012-07-10

    申请号：US11769128

    申请日：2007-06-27

    申请人： Louis L. Hsu ,  Hayden C. Cranford, Jr. ,  Joseph Natonio ,  James D. Rockrohr ,  Huihao Xu ,  Steven J. Zier

    发明人： Louis L. Hsu ,  Hayden C. Cranford, Jr. ,  Joseph Natonio ,  James D. Rockrohr ,  Huihao Xu ,  Steven J. Zier

    IPC分类号： H04B1/02

    CPC分类号： H04L25/0286 ,  H04L25/0272

    摘要： A method is provided for operating a transmitter integrated in a microelectronic element. In a calibration phase, a plurality of operational parameters are stored for controlling a frequency response of the transmitter under each of a plurality of corresponding operating conditions. Upon detecting an operating condition such as a temperature or power supply voltage level, the corresponding stored operational parameter is applied to the transmitter to control the frequency response.

    摘要翻译： 提供了一种用于操作集成在微电子元件中的发射器的方法。 在校准阶段中，存储多个操作参数，用于在多个对应的操作条件中的每一个下控制发射机的频率响应。 在检测到诸如温度或电源电压电平的操作条件时，将相应的存储的操作参数应用于发射机以控制频率响应。

    Design structure for transmitter bandwidth optimization circuit
    10.
    发明授权
    Design structure for transmitter bandwidth optimization circuit 有权
    发射机带宽优化电路的设计结构

    公开(公告)号：US08219041B2

    公开(公告)日：2012-07-10

    申请号：US11985963

    申请日：2007-11-19

    申请人： Louis L. Hsu ,  Hayden C. Cranford, Jr. ,  Joseph Natonio ,  James D. Rockrohr ,  Huihao Xu ,  Steven J. Zier

    发明人： Louis L. Hsu ,  Hayden C. Cranford, Jr. ,  Joseph Natonio ,  James D. Rockrohr ,  Huihao Xu ,  Steven J. Zier

    IPC分类号： H04B1/02

    CPC分类号： H04L25/0286 ,  H04L25/03343

    摘要： A design structure embodied in a machine-readable medium used in a design process provides a transmitter having a frequency response controllable in accordance with an operational parameter, and may include a storage operable to store operational parameters for controlling a frequency response of the transmitter under each of a plurality of corresponding operating conditions. A sensor can be used to detect an operating condition. In response to a change in the detected operating condition, a stored operational parameter corresponding to the detected operating condition can be used to control the frequency response of the transmitter.

    摘要翻译： 体现在设计过程中使用的机器可读介质中的设计结构提供具有根据操作参数可控的频率响应的发射机，并且可以包括可操作地存储用于控制每个发射机的频率响应的操作参数的存储器 的多个相应的操作条件。 可以使用传感器来检测操作状态。 响应于检测到的操作条件的变化，可以使用与检测到的操作条件对应的存储的操作参数来控制发送器的频率响应。