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    Design structure for on-chip electromigration monitoring system
    1.
    发明申请
    Design structure for on-chip electromigration monitoring system 有权
    片上电迁移监控系统的设计结构

    公开(公告)号：US20090132985A1

    公开(公告)日：2009-05-21

    申请号：US11985966

    申请日：2007-11-19

    申请人： Louis L. Hsu ,  Hayden C. Cranford, JR. ,  Oleg Gluschenkov ,  James S. Mason ,  Michael A. Sorna ,  Chih-Chao Yang

    发明人： Louis L. Hsu ,  Hayden C. Cranford, JR. ,  Oleg Gluschenkov ,  James S. Mason ,  Michael A. Sorna ,  Chih-Chao Yang

    IPC分类号： G06F17/50

    CPC分类号： G06F17/5036 ,  G01R31/2858

    摘要： A design structure embodied in a machine readable medium used in a design process can include apparatus of a semiconductor chip operable to detect an increase in resistance of a monitored element of the semiconductor chip. The design structure can include, for example, a resistive voltage divider circuit operable to output a plurality of reference voltages having different values. A plurality of comparators in the semiconductor chip may be coupled to receive the reference voltages and a monitored voltage representative of a resistance of the monitored element. Each of the comparators may produce an output indicating whether the monitored voltage exceeds the reference voltages, so that the resistance value of the monitored element may be precisely determined.

    摘要翻译： 体现在设计过程中使用的机器可读介质中的设计结构可以包括半导体芯片的装置，其可操作以检测半导体芯片的被监测元件的电阻的增加。 该设计结构可以包括例如可操作以输出具有不同值的多个参考电压的电阻分压器电路。 可以将半导体芯片中的多个比较器耦合以接收参考电压和表示所监视元件的电阻的监视电压。 每个比较器可以产生指示监视的电压是否超过参考电压的输出，使得可以精确地确定被监视元件的电阻值。

    On-chip electromigration monitoring
    2.
    发明申请
    On-chip electromigration monitoring 有权
    片上电迁移监测

    公开(公告)号：US20080265931A1

    公开(公告)日：2008-10-30

    申请号：US12215732

    申请日：2008-06-30

    申请人： Louis L. Hsu ,  Hayden C. Cranford ,  Oleg Gluschenkov ,  James S. Mason ,  Michael A. Sorna ,  Chih-Chao Yang

    发明人： Louis L. Hsu ,  Hayden C. Cranford ,  Oleg Gluschenkov ,  James S. Mason ,  Michael A. Sorna ,  Chih-Chao Yang

    IPC分类号： G01R31/26

    CPC分类号： G01R31/2858 ,  G01R31/2884 ,  G01R31/318533

    摘要： A method is provided for monitoring interconnect resistance within a semiconductor chip assembly. A semiconductor chip assembly can include a semiconductor chip having contacts exposed at a surface of the semiconductor chip and a substrate having exposed terminals in conductive communication with the contacts. A plurality of monitored elements of the semiconductor chip can include conductive interconnects, each interconnecting a respective pair of nodes of the semiconductor chip through wiring within the semiconductor chip. In an example of such method, a voltage drop across each monitored element is compared with a reference voltage drop across a respective reference element on the semiconductor chip at a plurality of different times during a lifetime of the semiconductor chip assembly. In that way, it can be detected when a resistance of such monitored element is over threshold. Based on a result of such comparison, a decision can be made whether to indicate an action condition.

    摘要翻译： 提供了一种用于监测半导体芯片组件内的互连电阻的方法。 半导体芯片组件可以包括具有暴露在半导体芯片的表面处的触点的半导体芯片和具有与触点导电连通的暴露端子的基板。 半导体芯片的多个受监测元件可以包括导电互连，每个导体互连通过半导体芯片内的布线互连半导体芯片的相应的一对节点。 在这种方法的示例中，在半导体芯片组件的寿命期间，跨越每个被监测元件的电压降与在半导体芯片上的相应参考元件上的参考电压降在多个不同时间进行比较。 以这种方式，当这种被监视的元件的电阻超过阈值时，可以检测它。 基于这种比较的结果，可以做出是否指示动作条件的决定。

    On-chip electromigration monitoring system
    3.
    发明授权
    On-chip electromigration monitoring system 有权
    片上电迁移监控系统

    公开(公告)号：US07394273B2

    公开(公告)日：2008-07-01

    申请号：US11306985

    申请日：2006-01-18

    申请人： Louis L. Hsu ,  Hayden C. Cranford, Jr. ,  Oleg Gluschenkov ,  James S. Mason ,  Michael A. Sorna ,  Chih-Chao Yang

    发明人： Louis L. Hsu ,  Hayden C. Cranford, Jr. ,  Oleg Gluschenkov ,  James S. Mason ,  Michael A. Sorna ,  Chih-Chao Yang

    IPC分类号： G01R31/02

    CPC分类号： G01R31/2858 ,  G01R31/2884 ,  G01R31/318533

    摘要： A packaged semiconductor chip is provided which includes a semiconductor chip and a package element. The semiconductor chip includes a plurality of semiconductor devices and a plurality of conductive features disposed at an exterior face of the semiconductor chip. The package element has a plurality of external features conductively connected to the plurality of conductive features of the semiconductor chip. The semiconductor chip includes a monitored element including a conductive interconnect that conductively interconnects a first node of the semiconductor chip to a second node of the semiconductor chip. A detection circuit in the semiconductor chip is operable to compare a variable voltage drop across the monitored element with a reference voltage drop across a reference element on the chip at a plurality of different times during a lifetime of the packaged semiconductor chip so as to detect when the resistance of the monitored element is over threshold.

    摘要翻译： 提供一种封装的半导体芯片，其包括半导体芯片和封装元件。 半导体芯片包括多个半导体器件和设置在半导体芯片的外表面处的多个导电特征。 封装元件具有导电连接到半导体芯片的多个导电特征的多个外部特征。 半导体芯片包括被监视的元件，该元件包括将半导体芯片的第一节点与半导体芯片的第二节点导电互连的导电互连。 半导体芯片中的检测电路可操作以在封装的半导体芯片的寿命期间的多个不同时间将所监视的元件上的可变电压降与芯片上的参考元件上的参考电压降进行比较，以便检测何时 被监测元件的电阻超过阈值。

    Structure for on-chip electromigration monitoring system
    4.
    发明授权
    Structure for on-chip electromigration monitoring system 有权
    片上电迁移监控系统结构

    公开(公告)号：US07840916B2

    公开(公告)日：2010-11-23

    申请号：US11985966

    申请日：2007-11-19

    申请人： Louis L. Hsu ,  Hayden C. Cranford, Jr. ,  Oleg Gluschenkov ,  James S. Mason ,  Michael A. Sorna ,  Chih-Chao Yang

    发明人： Louis L. Hsu ,  Hayden C. Cranford, Jr. ,  Oleg Gluschenkov ,  James S. Mason ,  Michael A. Sorna ,  Chih-Chao Yang

    IPC分类号： G06F17/50

    CPC分类号： G06F17/5036 ,  G01R31/2858

    摘要： A design structure embodied in a machine readable medium used in a design process can include apparatus of a semiconductor chip operable to detect an increase in resistance of a monitored element of the semiconductor chip. The design structure can include, for example, a resistive voltage divider circuit operable to output a plurality of reference voltages having different values. A plurality of comparators in the semiconductor chip may be coupled to receive the reference voltages and a monitored voltage representative of a resistance of the monitored element. Each of the comparators may produce an output indicating whether the monitored voltage exceeds the reference voltages, so that the resistance value of the monitored element may be precisely determined.

    摘要翻译： 体现在设计过程中使用的机器可读介质中的设计结构可以包括半导体芯片的装置，其可操作以检测半导体芯片的被监测元件的电阻的增加。 该设计结构可以包括例如可操作以输出具有不同值的多个参考电压的电阻分压器电路。 可以将半导体芯片中的多个比较器耦合以接收参考电压和表示所监视元件的电阻的监视电压。 每个比较器可以产生指示监视的电压是否超过参考电压的输出，使得可以精确地确定被监视元件的电阻值。

    On-chip electromigration monitoring
    5.
    发明授权
    On-chip electromigration monitoring 有权
    片上电迁移监测

    公开(公告)号：US07719302B2

    公开(公告)日：2010-05-18

    申请号：US12215732

    申请日：2008-06-30

    申请人： Louis L. Hsu ,  Hayden C. Cranford, Jr. ,  Oleg Gluschenkov ,  James S. Mason ,  Michael A. Sorna ,  Chih-Chao Yang

    发明人： Louis L. Hsu ,  Hayden C. Cranford, Jr. ,  Oleg Gluschenkov ,  James S. Mason ,  Michael A. Sorna ,  Chih-Chao Yang

    IPC分类号： G01R31/02

    CPC分类号： G01R31/2858 ,  G01R31/2884 ,  G01R31/318533

    摘要： A method is provided for monitoring interconnect resistance within a semiconductor chip assembly, A semiconductor chip assembly can include a semiconductor chip having contacts exposed at a surface of the semiconductor chip and a substrate having exposed terminals in conductive communication with the contacts. A plurality of monitored elements of the semiconductor chip can include conductive interconnects, each interconnecting a respective pair of nodes of the semiconductor chip through wiring within the semiconductor chip. In an example of such method, a voltage drop across each monitored element is compared with a reference voltage drop across a respective reference element on the semiconductor chip at a plurality of different times during a lifetime of the semiconductor chip assembly. In that way, it can be detected when a resistance of such monitored element is over threshold. Based on a result of such comparison, a decision can be made whether to indicate an action condition.

    摘要翻译： 提供了一种用于监测半导体芯片组件内的互连电阻的方法。半导体芯片组件可以包括具有在半导体芯片的表面处露出的触点的半导体芯片和具有与触点导电连通的露出端子的基板。 半导体芯片的多个受监测元件可以包括导电互连，每个导体互连通过半导体芯片内的布线互连半导体芯片的相应的一对节点。 在这种方法的示例中，在半导体芯片组件的寿命期间，跨越每个被监测元件的电压降与在半导体芯片上的相应参考元件上的参考电压降在多个不同时间进行比较。 以这种方式，当这种被监视的元件的电阻超过阈值时，可以检测它。 基于这种比较的结果，可以做出是否指示动作条件的决定。

    Systems and Arrangements for Controlling an Impedance on a Transmission Path
    6.
    发明申请
    Systems and Arrangements for Controlling an Impedance on a Transmission Path 审中-公开
    用于控制传输路径阻抗的系统和布置

    公开(公告)号：US20080123771A1

    公开(公告)日：2008-05-29

    申请号：US11557676

    申请日：2006-11-08

    申请人： Hayden C. Cranford ,  Daniel J. Friedman ,  James S. Mason ,  Martin L. Schmatz ,  Michael A. Sorna ,  Thomas H. Toifl

    发明人： Hayden C. Cranford ,  Daniel J. Friedman ,  James S. Mason ,  Martin L. Schmatz ,  Michael A. Sorna ,  Thomas H. Toifl

    IPC分类号： H04B15/00 ,  H03H7/40

    CPC分类号： H04L25/0278

    摘要： Systems for making impedance adjustments that will auto-tune a communication path is disclosed. The method can utilize time domain reflectometry (TDR) to acquire data about impedance mismatches and can adjust the termination impedances based on the acquired data. A system is also disclosed that has an isolator to decouple a first adjustable resistor from a transmission path in a first mode and couple the first adjustable resistor to the path in a second mode. The system can have a test transmitter to create a first current on the path in the first mode and to create a second current having twice the current in a second mode, wherein a detector can detect a first voltage during the first mode and a second voltage in the second mode as the first adjustable resistive load is adjusted in the second mode until it reaches a value matching the first voltage detected in the first mode.

    摘要翻译： 公开了用于进行自动调谐通信路径的阻抗调整的系统。 该方法可以利用时域反射（TDR）获取有关阻抗不匹配的数据，并可以根据获取的数据调整终端阻抗。 还公开了一种具有隔离器的系统，用于在第一模式中将第一可调电阻器与传输路径去耦，并将第一可调电阻器以第二模式耦合到路径。 该系统可以具有测试发射器，以在第一模式中在路径上产生第一电流，并且在第二模式中产生具有两倍电流的第二电流，其中检测器可以在第一模式期间检测第一电压，而第二电压 在第二模式中，第一可调电阻负载在第二模式中被调节，直到达到与在第一模式中检测到的第一电压匹配的值。

    Front end interface for data receiver
    7.
    发明授权
    Front end interface for data receiver 失效
    数据接收机的前端接口

    公开(公告)号：US07519130B2

    公开(公告)日：2009-04-14

    申请号：US10905705

    申请日：2005-01-18

    申请人： Louis L. Hsu ,  Matt R. Cordrey-Gale ,  James S. Mason ,  Philip J. Murfet ,  Karl D. Selander ,  Michael A. Sorna ,  Huihao Xu

    发明人： Louis L. Hsu ,  Matt R. Cordrey-Gale ,  James S. Mason ,  Philip J. Murfet ,  Karl D. Selander ,  Michael A. Sorna ,  Huihao Xu

    IPC分类号： H04L25/34

    CPC分类号： H04L25/0274 ,  H04L25/0296

    摘要： A data receiver is provided which includes a front end interface circuit having an alternating current (AC) transmission receiving mode and a direct current (DC) transmission receiving mode. The front end interface circuit includes an offset compensation circuit operable to compensate a DC voltage offset between a pair of differential signals input to the data receiver. The front end interface circuit further includes an AC/DC selection unit operable to switch between (a) the DC transmission receiving mode, and (b) the AC transmission receiving mode, such that the data receiver is operable in (i) the DC transmission mode in which the offset compensation circuit is disabled, (ii) the DC transmission mode in which the offset compensation circuit is enabled, (iii) the AC transmission mode in which the offset compensation circuit is disabled, and (iv) the AC transmission receiving mode in which the offset compensation circuit is enabled.

    摘要翻译： 提供一种数据接收器，其包括具有交流（AC）发送接收模式和直流（DC）发送接收模式的前端接口电路。 前端接口电路包括偏移补偿电路，其可操作以补偿输入到数据接收器的一对差分信号之间的直流电压偏移。 前端接口电路还包括可操作以在（a）直流发送接收模式和（b）交流发送接收模式之间切换的AC / DC选择单元，使得数据接收器可操作于（i）直流传输 偏移补偿电路被禁用的模式，（ii）使能偏移补偿电路的直流传输模式，（iii）偏移补偿电路被禁用的AC传输模式，以及（iv）AC传输接收 偏移补偿电路使能的模式。

    Apparatus and method for reduced loading of signal transmission elements
    9.
    发明授权
    Apparatus and method for reduced loading of signal transmission elements 有权
    信号传输元件负载减小的装置和方法

    公开(公告)号：US08040813B2

    公开(公告)日：2011-10-18

    申请号：US10908959

    申请日：2005-06-02

    申请人： Louis L. Hsu ,  Karl D. Selander ,  Michael A. Sorna ,  Daniel W. Storaska

    发明人： Louis L. Hsu ,  Karl D. Selander ,  Michael A. Sorna ,  Daniel W. Storaska

    IPC分类号： G01R31/08 ,  G06F11/00 ,  G08C15/00 ,  H04J1/16 ,  H04J3/14 ,  H04L1/00 ,  H04L12/26 ,  H03K17/16 ,  G05F1/00 ,  H03K5/01 ,  H03K9/00 ,  H03K5/00 ,  H03K19/0175 ,  G01N30/86

    CPC分类号： G06F13/4072

    摘要： An apparatus is provided which includes a common signal node operable to conduct a first signal, a first circuit coupled to the common signal node to utilize the first signal and a signal-handling element coupled to the common signal node. The signal-handling element includes an isolating circuit coupled to the first conductor, a second conductor operable to conduct an output of the isolating circuit, and a signal-handling circuit coupled to the second conductor. The signal-handling circuit is operable to perform a signal-handling function in response to the output of the isolating circuit. By virtue of the isolating circuit, the signal-handling circuit and the first circuit are isolated from the second conductor and the signal-handling circuit. Preferably, the achieved isolation permits a communication signal included in the first signal to be conducted within a communication apparatus with less capacitance, and producing less return loss of that signal.

    摘要翻译： 提供一种装置，其包括可操作以传导第一信号的公共信号节点，耦合到公共信号节点以利用第一信号的第一电路和耦合到公共信号节点的信号处理元件。 信号处理元件包括耦合到第一导体的隔离电路，可操作以导通隔离电路的输出的第二导体和耦合到第二导体的信号处理电路。 信号处理电路可操作以响应于隔离电路的输出执行信号处理功能。 通过隔离电路，信号处理电路和第一电路与第二导体和信号处理电路隔离。 优选地，所实现的隔离允许包含在第一信号中的通信信号在具有较小电容的通信设备内传导，并且产生较小的该信号的回波损耗。

    Structure for apparatus for reduced loading of signal transmission elements
    10.
    发明授权
    Structure for apparatus for reduced loading of signal transmission elements 有权
    信号传输元件负载减小的装置结构

    公开(公告)号：US08024679B2

    公开(公告)日：2011-09-20

    申请号：US11999627

    申请日：2007-12-06

    申请人： Louis L. Hsu ,  Karl D. Selander ,  Michael A. Sorna ,  Daniel W. Storaska

    发明人： Louis L. Hsu ,  Karl D. Selander ,  Michael A. Sorna ,  Daniel W. Storaska

    IPC分类号： G06F17/50

    CPC分类号： H03K19/0185 ,  H04L25/0266

    摘要： A design structure for a signal-handing apparatus or communication apparatus is provided which includes a common signal node operable to conduct a first signal, a first circuit coupled to the common signal node to utilize the first signal and a signal-handling element coupled to the common signal node. A signal-handling apparatus may include an isolating circuit coupled to a first conductor, a second conductor to conduct an output of the isolating circuit, and a signal-handling circuit coupled to the second conductor. A signal-handling circuit can perform a signal-handling function in response to the output of the isolating circuit. The signal-handling circuit and the first circuit may be isolated from the second conductor and the signal-handling circuit such that a communication signal may be conducted with less capacitance and be subject to less return loss.

    摘要翻译： 提供了一种用于信号处理装置或通信装置的设计结构，其包括可操作以传导第一信号的公共信号节点，耦合到公共信号节点以利用第一信号的第一电路和耦合到第一信号的信号处理元件 公共信号节点。 信号处理装置可以包括耦合到第一导体的隔离电路，用于导通隔离电路的输出的第二导体以及耦合到第二导体的信号处理电路。 信号处理电路可以响应于隔离电路的输出而执行信号处理功能。 信号处理电路和第一电路可以与第二导体和信号处理电路隔离，使得通信信号可以以较小的电容进行并且具有较小的回波损耗。