Electronic fuse with conformal fuse element formed over a freestanding dielectric spacer
    1.
    发明授权
    Electronic fuse with conformal fuse element formed over a freestanding dielectric spacer 失效
    具有保形熔丝元件的电子保险丝,形成在独立电介质垫片上

    公开(公告)号:US07545253B2

    公开(公告)日:2009-06-09

    申请号:US12128100

    申请日:2008-05-28

    IPC分类号: H01H85/08 H01L23/62

    摘要: An electronic fuse for an integrated circuit and a method of fabrication thereof are presented. The electronic fuse has a first terminal portion and a second terminal portion interconnected by a fuse element. The fuse element has a convex upper surface and a lower surface with a radius of curvature at a smallest surface area of curvature less than or equal to 100 nanometers. Fabricating the electronic fuse includes forming an at least partially freestanding dielectric spacer above a supporting structure, and then conformably forming the fuse element of the fuse over at least a portion of the freestanding dielectric spacer, with the fuse element characterized as noted above. The dielectric spacer may remain in place as a thermally insulating layer underneath the fuse element, or may be removed to form a void underneath the fuse element.

    摘要翻译: 本发明提供一种用于集成电路的电子熔断器及其制造方法。 电子熔断器具有由熔丝元件互连的第一端子部分和第二端子部分。 保险丝元件具有凸起的上表面和具有小于或等于100纳米的曲率的最小表面积的曲率半径的下表面。 制造电子熔断器包括在支撑结构之上形成至少部分独立的介电隔离物,然后在独立电介质隔离物的至少一部分上顺应地形成熔丝的熔丝元件,其中熔丝元件的特征如上所述。 电介质间隔物可以保留在熔丝元件下面的绝热层的适当位置,或者可以被去除以在熔丝元件下面形成空隙。

    Electronic fuse with conformal fuse element formed over a freestanding dielectric spacer
    2.
    发明授权
    Electronic fuse with conformal fuse element formed over a freestanding dielectric spacer 失效
    具有保形熔丝元件的电子保险丝,形成在独立电介质垫片上

    公开(公告)号:US07460003B2

    公开(公告)日:2008-12-02

    申请号:US11372387

    申请日:2006-03-09

    IPC分类号: H01H85/08 H01L23/62

    摘要: An electronic fuse for an integrated circuit and a method of fabrication thereof are presented. The electronic fuse has a first terminal portion and a second terminal portion interconnected by a fuse element. The fuse element has a convex upper surface and a lower surface with a radius of curvature at a smallest surface area of curvature less than or equal to 100 nanometers. Fabricating the electronic fuse includes forming an at least partially freestanding dielectric spacer above a supporting structure, and then conformably forming the fuse element of the fuse over at least a portion of the freestanding dielectric spacer, with the fuse element characterized as noted above. The dielectric spacer may remain in place as a thermally insulating layer underneath the fuse element, or may be removed to form a void underneath the fuse element.

    摘要翻译: 本发明提供一种用于集成电路的电子熔断器及其制造方法。 电子熔断器具有由熔丝元件互连的第一端子部分和第二端子部分。 保险丝元件具有凸起的上表面和具有小于或等于100纳米的曲率的最小表面积的曲率半径的下表面。 制造电子熔断器包括在支撑结构之上形成至少部分独立的介电隔离物,然后在独立电介质隔离物的至少一部分上顺应地形成熔丝的熔丝元件,其中熔丝元件的特征如上所述。 电介质间隔物可以保留在熔丝元件下面的绝热层的适当位置,或者可以被去除以在熔丝元件下面形成空隙。

    PATTERNED SILICON-ON-INSULATOR LAYERS AND METHODS FOR FORMING THE SAME
    3.
    发明申请
    PATTERNED SILICON-ON-INSULATOR LAYERS AND METHODS FOR FORMING THE SAME 有权
    图案的绝缘硅绝缘层及其形成方法

    公开(公告)号:US20080157261A1

    公开(公告)日:2008-07-03

    申请号:US12049258

    申请日:2008-03-14

    IPC分类号: H01L27/12

    CPC分类号: H01L21/76243

    摘要: In an aspect, a method is provided for forming a silicon-on-insulator (SOI) layer. The method includes the steps of (1) providing a silicon substrate; (2) selectively implanting the silicon substrate with oxygen using a low implant energy to form an ultra-thin patterned seed layer; and (3) employing the ultra-thin patterned seed layer to form a patterned SOI layer on the silicon substrate. Numerous other aspects are provided.

    摘要翻译: 在一方面,提供了一种用于形成绝缘体上硅(SOI)层的方法。 该方法包括以下步骤:(1)提供硅衬底; (2)使用低注入能量用氧选择性地注入硅衬底以形成超薄图案种子层; 和(3)使用超薄图案种子层在硅衬底上形成图案化SOI层。 提供了许多其他方面。

    Patterned silicon-on-insulator layers and methods for forming the same
    5.
    发明授权
    Patterned silicon-on-insulator layers and methods for forming the same 有权
    图案化的绝缘体上硅层及其形成方法

    公开(公告)号:US07659599B2

    公开(公告)日:2010-02-09

    申请号:US12049258

    申请日:2008-03-14

    IPC分类号: H01L29/00

    CPC分类号: H01L21/76243

    摘要: In an aspect, a method is provided for forming a silicon-on-insulator (SOI) layer. The method includes the steps of (1) providing a silicon substrate; (2) selectively implanting the silicon substrate with oxygen using a low implant energy to form an ultra-thin patterned seed layer; and (3) employing the ultra-thin patterned seed layer to form a patterned SOI layer on the silicon substrate. Numerous other aspects are provided.

    摘要翻译: 在一方面,提供了一种用于形成绝缘体上硅(SOI)层的方法。 该方法包括以下步骤:(1)提供硅衬底; (2)使用低注入能量用氧选择性地注入硅衬底以形成超薄图案种子层; 和(3)使用超薄图案种子层在硅衬底上形成图案化SOI层。 提供了许多其他方面。

    Electrically programmable fuse structures with terminal portions residing at different heights, and methods of fabrication thereof
    7.
    发明授权
    Electrically programmable fuse structures with terminal portions residing at different heights, and methods of fabrication thereof 失效
    具有位于不同高度的端子部分的电可编程熔丝结构及其制造方法

    公开(公告)号:US07645645B2

    公开(公告)日:2010-01-12

    申请号:US11372334

    申请日:2006-03-09

    IPC分类号: H01L21/82

    摘要: Electrically programmable fuse structures for an integrated circuit and methods of fabrication thereof are presented, wherein the electrically programmable fuse has a first terminal portion and a second terminal portion interconnected by a fuse element. The first terminal portion and the second terminal portion reside at different heights relative to a supporting surface of the fuse structure, and the interconnecting fuse element transitions between the different heights of the first terminal portion and the second terminal portion. The first and second terminal portions are oriented parallel to the supporting surface, while the fuse element includes a portion oriented orthogonal to the supporting surface, and includes at least one right angle bend where transitioning from at least one of the first and second terminal portions to the orthogonal oriented portion of the fuse element.

    摘要翻译: 提出了用于集成电路的电可编程熔丝结构及其制造方法,其中电可编程熔丝具有由熔丝元件互连的第一端子部分和第二端子部分。 第一端子部分和第二端子部分相对于熔丝结构的支撑表面驻留在不同的高度处,并且互连熔丝元件在第一端子部分和第二端子部分的不同高度之间转变。 第一端子部分和第二端子部分平行于支撑表面定向,而熔丝元件包括垂直于支撑表面定向的部分,并且包括至少一个直角弯曲部,其从第一和第二端子部分中的至少一个过渡到 保险丝元件的正交取向部分。

    Patterned silicon-on-insulator layers and methods for forming the same
    8.
    发明授权
    Patterned silicon-on-insulator layers and methods for forming the same 失效
    图案化的绝缘体上硅层及其形成方法

    公开(公告)号:US07566629B2

    公开(公告)日:2009-07-28

    申请号:US11155029

    申请日:2005-06-16

    IPC分类号: H01L21/76

    CPC分类号: H01L21/76243

    摘要: In an aspect, a method is provided for forming a silicon-on-insulator (SOI) layer. The method includes the steps of (1) providing a silicon substrate; (2) selectively implanting the silicon substrate with oxygen using a low implant energy to form an ultra-thin patterned seed layer; and (3) employing the ultra-thin patterned seed layer to form a patterned SOI layer on the silicon substrate. Numerous other aspects are provided.

    摘要翻译: 在一方面,提供了一种用于形成绝缘体上硅(SOI)层的方法。 该方法包括以下步骤:(1)提供硅衬底; (2)使用低注入能量用氧选择性地注入硅衬底以形成超薄图案种子层; 和(3)使用超薄图案种子层在硅衬底上形成图案化SOI层。 提供了许多其他方面。

    Storage Elements with Disguised Configurations and Methods of Using the Same
    9.
    发明申请
    Storage Elements with Disguised Configurations and Methods of Using the Same 审中-公开
    具有伪装配置的存储元件及其使用方法

    公开(公告)号:US20080067600A1

    公开(公告)日:2008-03-20

    申请号:US11533191

    申请日:2006-09-19

    IPC分类号: H01L23/62

    摘要: In a first aspect, a first apparatus is provided. The first apparatus is an element of an integrated circuit (IC) having (1) a metal-oxide-semiconductor field-effect transistor (MOSFET) having source/drain diffusion regions; (2) an electrical fuse (eFuse) coupled to the MOSFET such that a portion of the eFuse serves as a gate region of the MOSFET; and (3) an implanted region coupled to the source/drain diffusion regions of the MOSFET such that a path between the source/drain diffusion regions functions as a short circuit or an open circuit. Numerous other aspects are provided.

    摘要翻译: 在第一方面中,提供了一种第一装置。 第一装置是具有(1)具有源极/漏极扩散区域的金属氧化物半导体场效应晶体管(MOSFET)的集成电路(IC)的元件; (2)耦合到所述MOSFET的电熔丝(eFuse),使得所述eFuse的一部分用作所述MOSFET的栅极区域; 和(3)耦合到MOSFET的源极/漏极扩散区域的注入区域,使得源极/漏极扩散区域之间的路径用作短路或开路。 提供了许多其他方面。

    ELECTRONIC FUSE WITH CONFORMAL FUSE ELEMENT FORMED OVER A FREESTANDING DIELECTRIC SPACER
    10.
    发明申请
    ELECTRONIC FUSE WITH CONFORMAL FUSE ELEMENT FORMED OVER A FREESTANDING DIELECTRIC SPACER 失效
    具有合适的保险丝元件的电子保险丝在自动电介质间隔件上形成

    公开(公告)号:US20080258857A1

    公开(公告)日:2008-10-23

    申请号:US12128100

    申请日:2008-05-28

    IPC分类号: H01H85/08

    摘要: An electronic fuse for an integrated circuit and a method of fabrication thereof are presented. The electronic fuse has a first terminal portion and a second terminal portion interconnected by a fuse element. The fuse element has a convex upper surface and a lower surface with a radius of curvature at a smallest surface area of curvature less than or equal to 100 nanometers. Fabricating the electronic fuse includes forming an at least partially freestanding dielectric spacer above a supporting structure, and then conformably forming the fuse element of the fuse over at least a portion of the freestanding dielectric spacer, with the fuse element characterized as noted above. The dielectric spacer may remain in place as a thermally insulating layer underneath the fuse element, or may be removed to form a void underneath the fuse element.

    摘要翻译: 本发明提供一种用于集成电路的电子熔断器及其制造方法。 电子熔断器具有由熔丝元件互连的第一端子部分和第二端子部分。 保险丝元件具有凸起的上表面和具有小于或等于100纳米的曲率的最小表面积的曲率半径的下表面。 制造电子熔断器包括在支撑结构之上形成至少部分独立的介电隔离物,然后在独立电介质隔离物的至少一部分上顺应地形成熔丝的熔丝元件,其中熔丝元件的特征如上所述。 电介质间隔物可以保留在熔丝元件下面的绝热层的适当位置,或者可以被去除以在熔丝元件下面形成空隙。