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    Pitch reduced patterns relative to photolithography features
    3.
    发明授权
    Pitch reduced patterns relative to photolithography features 有权
    相对于光刻特征的间距减小

    公开(公告)号：US08119535B2

    公开(公告)日：2012-02-21

    申请号：US12636581

    申请日：2009-12-11

    申请人： Luan Tran ,  William T Rericha ,  John Lee ,  Ramakanth Alapati ,  Sheron Honarkhah ,  Shuang Meng ,  Puneet Sharma ,  Jingyi Bai ,  Zhiping Yin ,  Paul Morgan ,  Mirzafer K Abatchev ,  Gurtej S Sandhu ,  D. Mark Durcan

    发明人： Luan Tran ,  William T Rericha ,  John Lee ,  Ramakanth Alapati ,  Sheron Honarkhah ,  Shuang Meng ,  Puneet Sharma ,  Jingyi Bai ,  Zhiping Yin ,  Paul Morgan ,  Mirzafer K Abatchev ,  Gurtej S Sandhu ,  D. Mark Durcan

    IPC分类号： H01L21/302 ,  H01L21/461

    CPC分类号： H01L21/0338 ,  H01L21/0337 ,  H01L21/3086 ,  H01L21/3088

    摘要： Differently-sized features of an integrated circuit are formed by etching a substrate using a mask which is formed by combining two separately formed patterns. Pitch multiplication is used to form the relatively small features of the first pattern and conventional photolithography used to form the relatively large features of the second pattern. Pitch multiplication is accomplished by patterning a photoresist and then etching that pattern into an amorphous carbon layer. Sidewall spacers are then formed on the sidewalls of the amorphous carbon. The amorphous carbon is removed, leaving behind the sidewall spacers, which define the first mask pattern. A bottom anti-reflective coating (BARC) is then deposited around the spacers to form a planar surface and a photoresist layer is formed over the BARC. The photoresist is next patterned by conventional photolithography to form the second pattern, which is then is transferred to the BARC. The combined pattern made out by the first pattern and the second pattern is transferred to an underlying amorphous silicon layer and the pattern is subjected to a carbon strip to remove BARC and photoresist material. The combined pattern is then transferred to the silicon oxide layer and then to an amorphous carbon mask layer. The combined mask pattern, having features of difference sizes, is then etched into the underlying substrate through the amorphous carbon hard mask layer.

    摘要翻译： 通过使用通过组合两个单独形成的图案形成的掩模蚀刻衬底来形成集成电路的不同尺寸的特征。 间距乘法用于形成第一图案的相对较小的特征以及用于形成第二图案的较大特征的常规光刻。 间距倍增通过对光致抗蚀剂进行图案化，然后将该图案蚀刻成无定形碳层来实现。 然后在无定形碳的侧壁上形成侧壁间隔物。 去除无定形碳，留下限定第一掩模图案的侧壁间隔物。 然后将底部抗反射涂层（BARC）沉积在间隔物周围以形成平坦表面，并且在BARC上形成光致抗蚀剂层。 接下来通过常规光刻法将光致抗蚀剂图案化以形成第二图案，然后将其转印到BARC。 通过第一图案和第二图案形成的组合图案被转印到下面的非晶硅层，并且图案经受碳带以去除BARC和光致抗蚀剂材料。 然后将组合图案转移到氧化硅层，然后转移到无定形碳掩模层。 具有不同尺寸特征的组合掩模图案然后通过无定形碳硬掩模层蚀刻到下面的衬底中。

    Pitch reduced patterns relative to photolithography features
    6.
    发明授权
    Pitch reduced patterns relative to photolithography features 有权
    相对于光刻特征的间距减小

    公开(公告)号：US07718540B2

    公开(公告)日：2010-05-18

    申请号：US11670296

    申请日：2007-02-01

    申请人： Luan Tran ,  William T Rericha ,  John Lee ,  Ramakanth Alapati ,  Sheron Honarkhah ,  Shuang Meng ,  Puneet Sharma ,  Jingyi Bai ,  Zhiping Yin ,  Paul Morgan ,  Mirzafer K Abatchev ,  Gurtej S Sandhu ,  D. Mark Durcan

    发明人： Luan Tran ,  William T Rericha ,  John Lee ,  Ramakanth Alapati ,  Sheron Honarkhah ,  Shuang Meng ,  Puneet Sharma ,  Jingyi Bai ,  Zhiping Yin ,  Paul Morgan ,  Mirzafer K Abatchev ,  Gurtej S Sandhu ,  D. Mark Durcan

    IPC分类号： H01L21/302

    CPC分类号： H01L21/0338 ,  H01L21/0337 ,  H01L21/3086 ,  H01L21/3088

    摘要： Differently-sized features of an integrated circuit are formed by etching a substrate using a mask which is formed by combining two separately formed patterns. Pitch multiplication is used to form the relatively small features of the first pattern and conventional photolithography used to form the relatively large features of the second pattern. Pitch multiplication is accomplished by patterning a photoresist and then etching that pattern into an amorphous carbon layer. Sidewall spacers are then formed on the sidewalls of the amorphous carbon. The amorphous carbon is removed, leaving behind the sidewall spacers, which define the first mask pattern. A bottom anti-reflective coating (BARC) is then deposited around the spacers to form a planar surface and a photoresist layer is formed over the BARC. The photoresist is next patterned by conventional photolithography to form the second pattern, which is then is transferred to the BARC. The combined pattern made out by the first pattern and the second pattern is transferred to an underlying amorphous silicon layer and the pattern is subjected to a carbon strip to remove BARC and photoresist material. The combined pattern is then transferred to the silicon oxide layer and then to an amorphous carbon mask layer. The combined mask pattern, having features of difference sizes, is then etched into the underlying substrate through the amorphous carbon hard mask layer.

    摘要翻译： 通过使用通过组合两个单独形成的图案形成的掩模蚀刻衬底来形成集成电路的不同尺寸的特征。 间距乘法用于形成第一图案的相对较小的特征以及用于形成第二图案的较大特征的常规光刻。 间距倍增通过对光致抗蚀剂进行图案化，然后将该图案蚀刻成无定形碳层来实现。 然后在无定形碳的侧壁上形成侧壁间隔物。 去除无定形碳，留下限定第一掩模图案的侧壁间隔物。 然后将底部抗反射涂层（BARC）沉积在间隔物周围以形成平坦表面，并且在BARC上形成光致抗蚀剂层。 接下来通过常规光刻法将光致抗蚀剂图案化以形成第二图案，然后将其转印到BARC。 通过第一图案和第二图案形成的组合图案被转印到下面的非晶硅层，并且图案经受碳带以去除BARC和光致抗蚀剂材料。 然后将组合图案转移到氧化硅层，然后转移到无定形碳掩模层。 具有不同尺寸特征的组合掩模图案然后通过无定形碳硬掩模层蚀刻到下面的衬底中。

    PITCH REDUCED PATTERNS RELATIVE TO PHOTOLITHOGRAPHY FEATURES
    7.
    发明申请
    PITCH REDUCED PATTERNS RELATIVE TO PHOTOLITHOGRAPHY FEATURES 有权
    相对于光刻特征的PITCH减少图案

    公开(公告)号：US20100092891A1

    公开(公告)日：2010-04-15

    申请号：US12636581

    申请日：2009-12-11

    申请人： Luan Tran ,  William T. Rericha ,  John Lee ,  Ramakanth Alapati ,  Sheron Honarkhah ,  Shuang Meng ,  Puneet Sharma ,  Jingyi Bai ,  Zhiping Yin ,  Paul Morgan ,  Mirzafer K. Abatchev ,  Gurtej S. Sandhu ,  D. Mark Durcan

    发明人： Luan Tran ,  William T. Rericha ,  John Lee ,  Ramakanth Alapati ,  Sheron Honarkhah ,  Shuang Meng ,  Puneet Sharma ,  Jingyi Bai ,  Zhiping Yin ,  Paul Morgan ,  Mirzafer K. Abatchev ,  Gurtej S. Sandhu ,  D. Mark Durcan

    IPC分类号： G03F7/20

    CPC分类号： H01L21/0338 ,  H01L21/0337 ,  H01L21/3086 ,  H01L21/3088

    摘要： Differently-sized features of an integrated circuit are formed by etching a substrate using a mask which is formed by combining two separately formed patterns. Pitch multiplication is used to form the relatively small features of the first pattern and conventional photolithography used to form the relatively large features of the second pattern. Pitch multiplication is accomplished by patterning a photoresist and then etching that pattern into an amorphous carbon layer. Sidewall spacers are then formed on the sidewalls of the amorphous carbon. The amorphous carbon is removed, leaving behind the sidewall spacers, which define the first mask pattern. A bottom anti-reflective coating (BARC) is then deposited around the spacers to form a planar surface and a photoresist layer is formed over the BARC. The photoresist is next patterned by conventional photolithography to form the second pattern, which is then is transferred to the BARC. The combined pattern made out by the first pattern and the second pattern is transferred to an underlying amorphous silicon layer and the pattern is subjected to a carbon strip to remove BARC and photoresist material. The combined pattern is then transferred to the silicon oxide layer and then to an amorphous carbon mask layer. The combined mask pattern, having features of difference sizes, is then etched into the underlying substrate through the amorphous carbon hard mask layer.

    摘要翻译： 通过使用通过组合两个单独形成的图案形成的掩模蚀刻衬底来形成集成电路的不同尺寸的特征。 间距乘法用于形成第一图案的相对较小的特征以及用于形成第二图案的较大特征的常规光刻。 间距倍增通过对光致抗蚀剂进行图案化，然后将该图案蚀刻成无定形碳层来实现。 然后在无定形碳的侧壁上形成侧壁间隔物。 去除无定形碳，留下限定第一掩模图案的侧壁间隔物。 然后将底部抗反射涂层（BARC）沉积在间隔物周围以形成平坦表面，并且在BARC上形成光致抗蚀剂层。 接下来通过常规光刻法将光致抗蚀剂图案化以形成第二图案，然后将其转印到BARC。 通过第一图案和第二图案形成的组合图案被转印到下面的非晶硅层，并且图案经受碳带以去除BARC和光致抗蚀剂材料。 然后将组合图案转移到氧化硅层，然后转移到无定形碳掩模层。 具有不同尺寸特征的组合掩模图案然后通过无定形碳硬掩模层蚀刻到下面的衬底中。

    PITCH REDUCED PATTERNS RELATIVE TO PHOTOLITHOGRAPHY FEATURES
    8.
    发明申请
    PITCH REDUCED PATTERNS RELATIVE TO PHOTOLITHOGRAPHY FEATURES 失效
    相对于光刻特征的PITCH减少图案

    公开(公告)号：US20070161251A1

    公开(公告)日：2007-07-12

    申请号：US11681027

    申请日：2007-03-01

    申请人： Luan Tran ,  William Rericha ,  John Lee ,  Ramakanth Alapati ,  Sheron Honarkhah ,  Shuang Meng ,  Puneet Sharma ,  Jingyi Bai ,  Zhiping Yin ,  Paul Morgan ,  Mirzafer Abatchev ,  Gurtej Sandhu ,  D. Durcan

    发明人： Luan Tran ,  William Rericha ,  John Lee ,  Ramakanth Alapati ,  Sheron Honarkhah ,  Shuang Meng ,  Puneet Sharma ,  Jingyi Bai ,  Zhiping Yin ,  Paul Morgan ,  Mirzafer Abatchev ,  Gurtej Sandhu ,  D. Durcan

    IPC分类号： H01L21/302

    CPC分类号： H01L21/0338 ,  H01L21/0337 ,  H01L21/3086 ,  H01L21/3088

    摘要： Differently-sized features of an integrated circuit are formed by etching a substrate using a mask which is formed by combining two separately formed patterns. Pitch multiplication is used to form the relatively small features of the first pattern and conventional photolithography used to form the relatively large features of the second pattern. Pitch multiplication is accomplished by patterning a photoresist and then etching that pattern into an amorphous carbon layer. Sidewall spacers are then formed on the sidewalls of the amorphous carbon. The amorphous carbon is removed, leaving behind the sidewall spacers, which define the first mask pattern. A bottom anti-reflective coating (BARC) is then deposited around the spacers to form a planar surface and a photoresist layer is formed over the BARC. The photoresist is next patterned by conventional photolithography to form the second pattern, which is then is transferred to the BARC. The combined pattern made out by the first pattern and the second pattern is transferred to an underlying amorphous silicon layer and the pattern is subjected to a carbon strip to remove BARC and photoresist material. The combined pattern is then transferred to the silicon oxide layer and then to an amorphous carbon mask layer. The combined mask pattern, having features of difference sizes, is then etched into the underlying substrate through the amorphous carbon hard mask layer.

    摘要翻译： 通过使用通过组合两个单独形成的图案形成的掩模蚀刻衬底来形成集成电路的不同尺寸的特征。 间距乘法用于形成第一图案的相对较小的特征以及用于形成第二图案的较大特征的常规光刻。 间距倍增通过对光致抗蚀剂进行图案化，然后将该图案蚀刻成无定形碳层来实现。 然后在无定形碳的侧壁上形成侧壁间隔物。 去除无定形碳，留下限定第一掩模图案的侧壁间隔物。 然后将底部抗反射涂层（BARC）沉积在间隔物周围以形成平坦表面，并且在BARC上形成光致抗蚀剂层。 接下来通过常规光刻法将光致抗蚀剂图案化以形成第二图案，然后将其转印到BARC。 通过第一图案和第二图案形成的组合图案被转印到下面的非晶硅层，并且图案经受碳带以去除BARC和光致抗蚀剂材料。 然后将组合图案转移到氧化硅层，然后转移到无定形碳掩模层。 具有不同尺寸特征的组合掩模图案然后通过无定形碳硬掩模层蚀刻到下面的衬底中。

    Multiple deposition for integration of spacers in pitch multiplication process
    10.
    发明授权
    Multiple deposition for integration of spacers in pitch multiplication process 有权
    用于在间距乘法过程中整合间隔物的多次沉积

    公开(公告)号：US07390746B2

    公开(公告)日：2008-06-24

    申请号：US11213486

    申请日：2005-08-25

    申请人： Jingyi Bai ,  Gurtej S. Sandhu ,  Shuang Meng

    发明人： Jingyi Bai ,  Gurtej S. Sandhu ,  Shuang Meng

    IPC分类号： H01L21/302

    CPC分类号： H01L21/0337 ,  H01L21/0338 ,  H01L21/3086 ,  H01L21/3088

    摘要： Pitch multiplication is performed using a two step process to deposit spacer material on mandrels. The precursors of the first step react minimally with the mandrels, forming a barrier layer against chemical reactions for the deposition process of the second step, which uses precursors more reactive with the mandrels. Where the mandrels are formed of amorphous carbon and the spacer material is silicon oxide, the silicon oxide is first deposited by a plasma enhanced deposition process and then by a thermal chemical vapor deposition process. Oxygen gas and plasma-enhanced tetraethylorthosilicate (TEOS) are used as reactants in the plasma enhanced process, while ozone and TEOS are used as reactants in the thermal chemical vapor deposition process. The oxygen gas is less reactive with the amorphous carbon than ozone, thereby minimizing deformation of the mandrels caused by oxidation of the amorphous carbon.

    摘要翻译： 使用两步法将间隔物材料沉积在心轴上进行间距倍增。 第一步的前体与心轴发生最小的反应，形成抵抗第二步骤沉积过程的化学反应的阻挡层，其使用与心轴更具反应性的前体。 在心轴由非晶碳形成并且间隔物材料是氧化硅的情况下，首先通过等离子体增强沉积工艺沉积氧化硅，然后通过热化学气相沉积工艺沉积。 在等离子体增强过程中使用氧气和等离子体增强的四乙基原硅酸盐（TEOS）作为反应物，而在热化学气相沉积工艺中使用臭氧和TEOS作为反应物。 氧气与无定形碳的反应性低于臭氧，从而最小化由无定形碳的氧化引起的心轴的变形。