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公开(公告)号:US09876953B2
公开(公告)日:2018-01-23
申请号:US13881463
申请日:2011-10-31
申请人: Luigi Bagnato , Laurent Jacques , Pierre Vandergheynst , Hossein Afshari , Alexandre Schmid , Yusuf Leblebici
发明人: Luigi Bagnato , Laurent Jacques , Pierre Vandergheynst , Hossein Afshari , Alexandre Schmid , Yusuf Leblebici
CPC分类号: H04N5/23238 , G02B27/2228 , G03B35/08 , G03B37/04 , H04N5/2258 , H04N5/2259 , H04N5/23206
摘要: An omnidirectional sensor array system, for example a panoptic camera, comprising a plurality of sensors arranged on a support of predetermined shape to acquire data, wherein said sensors are directional and wherein each sensor is attached to a processing node which comprises integrated electronics that carries out at least a portion of the signal processing algorithms locally in order to reduce the computational load of a central hardware unit.
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公开(公告)号:US20140146132A1
公开(公告)日:2014-05-29
申请号:US13881463
申请日:2011-10-31
申请人: Luigi Bagnato , Laurent Jacques , Pierre Vandergheynst , Hossein Afshari , Alexandre Schmid , Yusuf Leblebici
发明人: Luigi Bagnato , Laurent Jacques , Pierre Vandergheynst , Hossein Afshari , Alexandre Schmid , Yusuf Leblebici
IPC分类号: H04N5/232
CPC分类号: H04N5/23238 , G02B27/2228 , G03B35/08 , G03B37/04 , H04N5/2258 , H04N5/2259 , H04N5/23206
摘要: An omnidirectional sensor array system, for example a panoptic camera, comprising a plurality of sensors arranged on a support of predetermined shape to acquire data, wherein said sensors are directional and wherein each sensor is attached to a processing node which comprises integrated electronics that carries out at least a portion of the signal processing algorithms locally in order to reduce the computational load of a central hardware unit.
摘要翻译: 一种全向传感器阵列系统,例如全景相机,包括布置在预定形状的支撑体上的多个传感器以获取数据,其中所述传感器是定向的,并且其中每个传感器附接到处理节点,该处理节点包括执行 本地的信号处理算法的至少一部分以减少中央硬件单元的计算负载。
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公开(公告)号:US09252252B2
公开(公告)日:2016-02-02
申请号:US13899666
申请日:2013-05-22
IPC分类号: H01L21/00 , H01L21/32 , H01L21/47 , H01L29/775 , H01L29/66 , H01L29/423 , H01L29/78 , H01L29/06 , H01L29/786 , B82Y10/00
CPC分类号: H01L29/775 , B82Y10/00 , H01L29/0673 , H01L29/42356 , H01L29/42392 , H01L29/66439 , H01L29/7839 , H01L29/78642 , H01L29/78696
摘要: This invention describes a novel electronic device consisting of one—or more—vertically stacked gate-all-around silicon nanowire field effect transistor (SNWFET) with two independent gate electrodes. One of the two gate electrodes, acting on the central section of the transistor channel, controls on/off behavior of the channel. The second gate, acting on the regions in proximity to the source and the drain of the transistor, defines the polarity of the devices, i.e. p or n type. The electric field of the second gate acts either at the interface of the nanowire-to-source/drain region or anywhere in close proximity to the depleted region of the SiNW body, modulating the bending of the Schottky barriers at the contacts, eventually screening one type of charge carrier to pass through the channel of the transistor. This is achieved by controlling the majority carriers passing through the transistor channel by regulating the Schottky barrier thicknesses at the source and drain contacts.
摘要翻译: 本发明描述了一种由具有两个独立栅电极的一个或多个垂直堆叠的栅极全周硅纳米线场效应晶体管(SNWFET)组成的新型电子器件。 作用在晶体管通道的中心部分的两个栅电极之一控制通道的开/关行为。 作用在晶体管的源极和漏极附近的区域上的第二栅极限定了器件的极性,即p或n型。 第二栅极的电场作用在纳米线到源极/漏极区的界面处或者靠近SiNW体的耗尽区的任何地方,调节在接触处的肖特基势垒的弯曲,最终筛选一个 电荷载体的类型通过晶体管的沟道。 这是通过调节源极和漏极触点上的肖特基势垒厚度来控制通过晶体管沟道的多数载流子来实现的。
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公开(公告)号:US20080246062A1
公开(公告)日:2008-10-09
申请号:US12076906
申请日:2008-03-25
申请人: Elizabeth Brauer , Yusuf Leblebici
发明人: Elizabeth Brauer , Yusuf Leblebici
CPC分类号: H03K19/0948 , H01L29/78 , H03K19/086
摘要: The field of invention is in the area of MOS integrated circuits operating with very low currents in the weak inversion region or sub threshold. The method aims at providing linear resistor with a value in the multi-mega ohm range.In order to produce Silicon based high resistance value, the claimed invention provides a semiconductor resistance using MOS transistor comprising a gate, drain, source and body terminals wherein the body terminal is tied to the drain terminal, the voltage applied between the source and the gate defining the resistance value.
摘要翻译: 本发明的领域是在弱反向区域或次阈值下以非常低的电流工作的MOS集成电路的区域。 该方法旨在提供具有多兆欧姆范围内的值的线性电阻。 为了产生基于硅的高电阻值,所要求保护的发明提供了使用MOS晶体管的半导体电阻,其包括栅极,漏极,源极和主体端子,其中主体端子被连接到漏极端子,施加在源极和栅极之间的电压 定义电阻值。
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5.
公开(公告)号:US20130313524A1
公开(公告)日:2013-11-28
申请号:US13899666
申请日:2013-05-22
IPC分类号: H01L29/775 , H01L29/66
CPC分类号: H01L29/775 , B82Y10/00 , H01L29/0673 , H01L29/42356 , H01L29/42392 , H01L29/66439 , H01L29/7839 , H01L29/78642 , H01L29/78696
摘要: This invention describes a novel electronic device consisting of one—or more—vertically stacked gate-all-around silicon nanowire field effect transistor (SNWFET) with two independent gate electrodes. One of the two gate electrodes, acting on the central section of the transistor channel, controls on/off behavior of the channel. The second gate, acting on the regions in proximity to the source and the drain of the transistor, defines the polarity of the devices, i.e. p or n type. The electric field of the second gate acts either at the interface of the nanowire-to-source/drain region or anywhere in close proximity to the depleted region of the SiNW body, modulating the bending of the Schottky barriers at the contacts, eventually screening one type of charge carrier to pass through the channel of the transistor. This is achieved by controlling the majority carriers passing through the transistor channel by regulating the Schottky barrier thicknesses at the source and drain contacts.
摘要翻译: 本发明描述了一种由具有两个独立栅电极的一个或多个垂直堆叠的栅极全周硅纳米线场效应晶体管(SNWFET)组成的新型电子器件。 作用在晶体管通道的中心部分的两个栅电极之一控制通道的开/关行为。 作用在晶体管的源极和漏极附近的区域上的第二栅极限定了器件的极性,即p或n型。 第二栅极的电场作用于纳米线至源极/漏极区域的接口处或与SiNW体的耗尽区域非常接近的任何位置,调节触点处的肖特基势垒的弯曲,最终筛选一个 电荷载体的类型通过晶体管的沟道。 这是通过调节源极和漏极触点上的肖特基势垒厚度来控制通过晶体管沟道的多数载流子来实现的。
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