公开(公告)号：US10256908B2

公开(公告)日：2019-04-09

申请号：US14729826

申请日：2015-06-03

Applicant: Luxtera, Inc.

Inventor： Attila Mekis ,  Peter DeDobbelaere ,  Kosei Yokoyama ,  Sherif Abdalla ,  Steffen Gloeckner ,  John Guckenberger ,  Thierry Pinguet ,  Gianlorenzo Masini ,  Daniel Kucharski

IPC: H04B10/2575 ,  H04B10/40 ,  H01L21/84 ,  H01L27/12 ,  H01L27/06 ,  H01L25/16 ,  H01L25/065

Abstract: Methods and systems for monolithic integration of photonics and electronics in CMOS processes are disclosed and may include in an optoelectronic transceiver comprising photonic and electronic devices from two complementary metal-oxide semiconductor (CMOS) die with different silicon layer thicknesses for the photonic and electronic devices, the CMOS die bonded together by metal contacts: communicating optical signals and electronic signals to and from said optoelectronic transceiver utilizing a received continuous wave optical signal as a source signal. A first of the CMOS die includes the photonic devices and a second includes the electronic devices. Electrical signals may be communicated between electrical devices to the optical devices utilizing through-silicon vias coupled to the metal contacts. The metal contacts may include back-end metals from a CMOS process. The electronic and photonic devices may be fabricated on SOI wafers, with the SOI wafers being diced to form the CMOS die.

公开(公告)号：US20190238228A1

公开(公告)日：2019-08-01

申请号：US16378119

申请日：2019-04-08

Applicant: Luxtera, Inc.

Inventor： Attila Mekis ,  Peter DeDobbelaere ,  Kosei Yokoyama ,  Sherif Abdalla ,  Steffen Gloeckner ,  John Guckenberger ,  Thierry Pinguet ,  Gianlorenzo Masini ,  Daniel Kucharski

IPC: H04B10/2575 ,  H01L27/12 ,  H04B10/40 ,  H01L21/84

CPC classification number: H04B10/2575 ,  H01L21/84 ,  H01L25/0652 ,  H01L25/167 ,  H01L27/0688 ,  H01L27/1203 ,  H01L2225/06541 ,  H04B10/40

Abstract: Methods and systems for monolithic integration of photonics and electronics in CMOS processes are disclosed and may include fabricating photonic and electronic devices on two CMOS wafers with different silicon layer thicknesses. The devices may be fabricated on semiconductor-on-insulator (SOI) wafers utilizing a bulk CMOS process and/or on a SOI wafer utilizing a SOI CMOS process. The different thicknesses may be fabricated utilizing a double SOI process and/or a selective area growth process. Cladding layers may be fabricated utilizing one or more oxygen implants and/or utilizing CMOS trench oxide on the CMOS wafer. Silicon may be deposited on the CMOS trench oxide utilizing epitaxial lateral overgrowth. Cladding layers may be fabricated utilizing selective backside etching. Reflective surfaces may be fabricated by depositing metal on the selectively etched regions. Silicon dioxide or silicon germanium integrated in the CMOS wafer may be utilized as an etch stop layer.

公开(公告)号：US20150270898A1

公开(公告)日：2015-09-24

申请号：US14729826

申请日：2015-06-03

Applicant: Luxtera, Inc.

Inventor： Attila Mekis ,  Peter De Dobbelaere ,  Kosei Yokoyama ,  Sherif Abdalla ,  Steffen Gloeckner ,  John Guckenberger ,  Thierry Pinguet ,  Gianlorenzo Masini

IPC: H04B10/2575 ,  H04B10/40

CPC classification number: H04B10/2575 ,  H01L21/84 ,  H01L27/1203 ,  H04B10/40

Abstract: Methods and systems for monolithic integration of photonics and electronics in CMOS processes are disclosed and may include in an optoelectronic transceiver comprising photonic and electronic devices from two complementary metal-oxide semiconductor (CMOS) die with different silicon layer thicknesses for the photonic and electronic devices, the CMOS die bonded together by metal contacts: communicating optical signals and electronic signals to and from said optoelectronic transceiver utilizing a received continuous wave optical signal as a source signal. A first of the CMOS die includes the photonic devices and a second includes the electronic devices. Electrical signals may be communicated between electrical devices to the optical devices utilizing through-silicon vias coupled to the metal contacts. The metal contacts may include back-end metals from a CMOS process. The electronic and photonic devices may be fabricated on SOI wafers, with the SOI wafers being diced to form the CMOS die.

Abstract translation: 公开了用于在CMOS工艺中单片集成光子学和电子学的方法和系统，并且可以包括在包含来自具有用于光子和电子器件的不同硅层厚度的两个互补金属氧化物半导体（CMOS）裸片的光子和电子器件的光电收发器中， 通过金属触点接合在一起的CMOS芯片：利用接收的连续波光信号作为源信号将光信号和电子信号传送到所述光电收发器和从所述光电收发器传送。 第一个CMOS管芯包括光子器件，第二个包括电子器件。 电信号可以通过耦合到金属触点的通硅通孔在电子器件之间传送到光学器件。 金属触点可以包括来自CMOS工艺的后端金属。 电子和光子器件可以制造在SOI晶片上，SOI晶片被切割以形成CMOS管芯。