Abstract:
A die structure is described, including a device area and a contact test area. The device area has therein a device structure including a first contact plug. The contact test area has therein a contact test structure that includes a second contact plug and is different from the device structure. The contact test structure is also described, including a well, a heavily doped region in the well, and a contact plug, wherein the heavily doped region and the well are both of N-type or are both of P-type, and the contact plug is disposed over the heavily doped region.
Abstract:
Present example embodiments relate generally to methods, logic, systems, and devices for inspecting a semiconductor device. Example methods comprise applying an initial energy from an energy source to a first location of a conductive layer of the semiconductor device. Example methods further comprise measuring a resultant energy passing through the conductive layer using a probe at a second location of the conductive layer and analyzing the measured resultant energy passing through the conductive layer. Example methods further comprise determining a presence of an inconsistency in the conductive layer based on the analyzing.
Abstract:
Methods and systems for the detection of defects in semiconductors, semiconductor devices, or substrates are provided. Semiconductors, semiconductor devices or substrates having novel test patterns and or designs are also provided. The semiconductors, semiconductor devices or substrates have a plurality of line patterns, which, in response to a responsive stimulus such as electron beam irradiation, produces a response. The responsive stimulus may include an electron beam irradiation, and the image data can be collected and processed to produce an image or images that indicate the presence or absence of surface and/or internal defects.