公开(公告)号：US09312139B2

公开(公告)日：2016-04-12

申请号：US13891238

申请日：2013-05-10

Applicant: MACRONIX INTERNATIONAL CO., LTD.

Inventor： Ching-Hung Wang ,  Jyun-Siang Huang ,  Chien-Hung Liu ,  Chia-Wen Cheng ,  Ying-Tso Chen

IPC: H01L21/28 ,  H01L21/768 ,  H01L27/115

CPC classification number: H01L21/28282 ,  H01L21/76802 ,  H01L27/11568

Abstract: A semiconductor element and a manufacturing method of the same are provided. The semiconductor element includes a substrate, a plurality of doping strips, a memory material layer, a plurality of conductive damascene structures, and a dielectric structure. The doping strips are formed in the substrate. The memory material layer is formed on the substrate, and the memory material layer comprises a memory area located on two sides of the doping strips. The conductive damascene structures are formed on the memory material layer. The dielectric structure is formed on the doping strips and between the conductive damascene structures. The conductive damascene structures are extended in a direction perpendicular to a direction which the doping strips are extended in.

Abstract translation: 提供了一种半导体元件及其制造方法。 半导体元件包括衬底，多个掺杂条，存储材料层，多个导电镶嵌结构和电介质结构。 在衬底中形成掺杂条。 存储材料层形成在衬底上，并且存储材料层包括位于掺杂条的两侧的存储区。 导电镶嵌结构形成在记忆材料层上。 介电结构形成在掺杂条上和导电镶嵌结构之间。 导电镶嵌结构在垂直于掺杂条延伸的方向的方向上延伸。

公开(公告)号：US20140264545A1

公开(公告)日：2014-09-18

申请号：US13891238

申请日：2013-05-10

Applicant: MACRONIX INTERNATIONAL CO., LTD.

Inventor： Ching-Hung Wang ,  Jyun-Siang Huang ,  Chien-Hung Liu ,  Chia-Wen Cheng ,  Ying-Tso Chen

IPC: H01L27/115

CPC classification number: H01L21/28282 ,  H01L21/76802 ,  H01L27/11568

Abstract: A semiconductor element and a manufacturing method of the same are provided. The semiconductor element includes a substrate, a plurality of doping strips, a memory material layer, a plurality of conductive damascene structures, and a dielectric structure. The doping strips are formed in the substrate. The memory material layer is formed on the substrate, and the memory material layer comprises a memory area located on two sides of the doping strips. The conductive damascene structures are formed on the memory material layer. The dielectric structure is formed on the doping strips and between the conductive damascene structures. The conductive damascene structures are extended in a direction perpendicular to a direction which the doping strips are extended in.

Abstract translation: 提供了一种半导体元件及其制造方法。 半导体元件包括衬底，多个掺杂条，存储材料层，多个导电镶嵌结构和电介质结构。 在衬底中形成掺杂条。 存储材料层形成在衬底上，并且存储材料层包括位于掺杂条的两侧的存储区。 导电镶嵌结构形成在记忆材料层上。 介电结构形成在掺杂条上和导电镶嵌结构之间。 导电镶嵌结构在垂直于掺杂条延伸的方向的方向上延伸。