TIME EFFICIENT COUNTERS AND METERS ARCHITECTURE
    2.
    发明申请
    TIME EFFICIENT COUNTERS AND METERS ARCHITECTURE 有权
    时间有效的计数器和仪表架构

    公开(公告)号:US20140328196A1

    公开(公告)日:2014-11-06

    申请号:US14269664

    申请日:2014-05-05

    Abstract: A network device includes a plurality of interfaces configured to receive, from a network, packets to be processed by the network device. A load determination circuit of the network device is configured to determine whether a packet traffic load of the network device is above a traffic load threshold, and a dual-mode counter module is configured to (i) determine a count of quanta associated with the received packets using a first counting mode in response to the load determination unit determining that the packet traffic load is above the traffic load threshold, and (ii) determine a count of quanta associated with the received packets using a second counting mode, different than the first counting mode, in response to the load determination unit determining that the packet traffic load is not above the traffic load threshold.

    Abstract translation: 网络设备包括被配置为从网络接收要由网络设备处理的分组的多个接口。 网络设备的负载确定电路被配置为确定网络设备的分组业务负载是否高于业务负载阈值,并且双模计数器模块被配置为(i)确定与所接收的相关联的量子的计数 响应于负载确定单元确定分组业务负载高于业务负载阈值,并且(ii)使用与第一计数模式不同的第二计数模式来确定与所接收的分组相关联的量化的计数, 计数模式,响应于负载确定单元确定分组业务负载不高于业务负载阈值。

    Time efficient counters and meters architecture

    公开(公告)号:US10333802B2

    公开(公告)日:2019-06-25

    申请号:US15722601

    申请日:2017-10-02

    Abstract: A meter module for use in a network device comprises conformance circuitry configured to: access a first memory device storing a conformance indicator that indicates whether a permitted rate of packet traffic has been exceeded, and classify packets received at the network device based at least in part on the conformance indicator. Sampling circuitry is configured to, responsively to the conformance circuitry classifying the packets: sample events associated with at least some of the received packets, and generate indicators of the sampled events. Update circuitry is configured to: access a second memory device, slower than the first memory, to update a number of tokens stored in the second memory device, and access the first memory device to update the conformance indicator when the updated number of tokens indicates that the permitted rate of packet traffic has been exceeded.

    Time efficient counters and meters architecture

    公开(公告)号:US09781018B2

    公开(公告)日:2017-10-03

    申请号:US14269664

    申请日:2014-05-05

    Abstract: A network device includes a plurality of interfaces configured to receive, from a network, packets to be processed by the network device. A load determination circuit of the network device is configured to determine whether a packet traffic load of the network device is above a traffic load threshold, and a dual-mode counter module is configured to (i) determine a count of quanta associated with the received packets using a first counting mode in response to the load determination unit determining that the packet traffic load is above the traffic load threshold, and (ii) determine a count of quanta associated with the received packets using a second counting mode, different than the first counting mode, in response to the load determination unit determining that the packet traffic load is not above the traffic load threshold.

    Efficient Longest Prefix Matching Techniques for Network Devices
    5.
    发明申请
    Efficient Longest Prefix Matching Techniques for Network Devices 有权
    网络设备的高效前缀匹配技术

    公开(公告)号:US20140244779A1

    公开(公告)日:2014-08-28

    申请号:US14192579

    申请日:2014-02-27

    CPC classification number: H04L61/103 H04L45/7453 H04L45/748

    Abstract: A network address associated with a packet is obtained at a search engine of a network device. The search engine includes a plurality of Bloom filters that represent prefixes of respective lengths in the routing table. Respective Bloom filters are applied to respective prefixes of the network address to determine a set of one or more prefixes for which a match potentially exists in the routing table. A number of accesses to the memory are performed using prefixes in set of prefixes, beginning with a longest prefix and continuing in decreasing order of prefix lengths until a matching entry is found in the routing table, and routing information for the packet is retrieved. If the number of performed memory accesses exceeds a threshold, the routing table is adapted to reduce a number of memory accesses to be performed for subsequent packets associated with the network address.

    Abstract translation: 在网络设备的搜索引擎处获得与分组相关联的网络地址。 搜索引擎包括表示路由表中相应长度的前缀的多个布隆过滤器。 相应的Bloom过滤器被应用于网络地址的相应前缀,以确定在路由表中可能存在匹配的一个或多个前缀的集合。 使用前缀集合中的前缀,以最长前缀开始并以前缀长度的递减顺序继续进行对存储器的多次访问,直到在路由表中找到匹配的条目,并且检索分组的路由信息​​。 如果执行的存储器访问次数超过阈值,则路由表适于减少对与网络地址相关联的后续分组执行的存储器访问次数。

    Efficient longest prefix matching techniques for network devices

    公开(公告)号:US09819637B2

    公开(公告)日:2017-11-14

    申请号:US14192579

    申请日:2014-02-27

    CPC classification number: H04L61/103 H04L45/7453 H04L45/748

    Abstract: A network address associated with a packet is obtained at a search engine of a network device. The search engine includes a plurality of Bloom filters that represent prefixes of respective lengths in the routing table. Respective Bloom filters are applied to respective prefixes of the network address to determine a set of one or more prefixes for which a match potentially exists in the routing table. A number of accesses to the memory are performed using prefixes in set of prefixes, beginning with a longest prefix and continuing in decreasing order of prefix lengths until a matching entry is found in the routing table, and routing information for the packet is retrieved. If the number of performed memory accesses exceeds a threshold, the routing table is adapted to reduce a number of memory accesses to be performed for subsequent packets associated with the network address.

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