公开(公告)号：US20180375500A1

公开(公告)日：2018-12-27

申请号：US15634007

申请日：2017-06-27

Applicant: MEDIATEK INC.

Inventor： Min-Hang HSIEH ,  Wei-Min HSU ,  Jen-Hang YANG

IPC: H03K3/356 ,  G01R31/3177 ,  G01R31/317

CPC classification number: H03K3/356104 ,  G01R31/31723 ,  G01R31/31727 ,  G01R31/3177 ,  H03K3/012 ,  H03K3/0372 ,  H03K3/35625

Abstract: A scan output flip-flop is provided. The scan output flip-flop outputs a scan-out signal at a first output terminal and includes a selection circuit, a control circuit, and a scan-out stage circuit. The selection circuit is controlled by a first test enable signal to transmit a data signal on a first input terminal or a test signal on a second input terminal to an output terminal of the selection circuit to serve as an input signal. The control circuit is coupled to the output terminal of the selection circuit and controlled by a first clock signal to generate a first control signal and a second control signal according to the input signal. The second control signal is the inverse of the first control signal. The scan-out stage circuit is controlled by the first control signal and the second control signal to generate the scan-out signal.

公开(公告)号：US20230170881A1

公开(公告)日：2023-06-01

申请号：US18049725

申请日：2022-10-26

Applicant: MEDIATEK INC.

Inventor： Wei-Min HSU ,  Jen-Hang YANG

IPC: H03K3/012 ,  H03K19/0185 ,  H03K3/037

CPC classification number: H03K3/012 ,  H03K3/0372 ,  H03K19/018521 ,  H03K19/20

Abstract: A register with data retention includes a master-slave flip-flop, a balloon latch, and a level shifter. The master-slave flip-flop is supplied by a first power voltage. The balloon latch is supplied by a second power voltage. The second power voltage is independent of the first power voltage. The level shifter provides a voltage conversion between the master-slave flip-flop and the balloon latch. A data is stored in the master-slave flip-flop. When the first power voltage is disabled, the balloon latch is configured to temporarily retain the data.