Abstract:
An integrated circuit including a processor configured to operate off a supply voltage being applied at one of a plurality of external pins; and internal input/output circuitry configured to select between the supply voltage and at least one other supply voltage being applied at another of the plurality of external pins.
Abstract:
A microprocessor or microcontroller device may have a central processing unit (CPU), a data memory coupled with the CPU, wherein the data memory is divided into a plurality of memory banks, wherein a bank select register determines which memory bank is currently coupled with the CPU. Furthermore, a first and second set of special function registers are provided, wherein upon occurrence of a context switch either the first or the second set of special function register are selected as active context registers for the CPU and the respective other set of special function registers are selected as inactive context registers, wherein at least some of the registers of the active context registers are memory mapped to more than two memory banks of the data memory and wherein all registers of the inactive context registers are memory mapped to at least one memory location within the data memory.
Abstract:
A physical force capacitive touch sensor comprises a capacitive sensor element on a substrate, a physically deformable electrically insulating spacer over the capacitive sensor element and a conductive deformable plane over the physically deformable electrically insulating spacer. A protective deformable fascia may be placed over the conductive deformable plane to provide an environmental seal for physical and weather protection, but is not essential to operation of the capacitive touch sensor. Back lighting is accomplished through a light transmissive layer(s) in the capacitive touch sensor. When the conductive deformable plane is displaced toward the capacitive touch sensor element, the capacitance value of the capacitive touch sensor element changes and that change may be detected and used as an actuation signal.
Abstract:
A microcontroller has a numerical controlled oscillator receiving a primary clock signal and is configured to provide an internal system clock of the microcontroller. A method for operating a microcontroller performs the following steps: Selecting a primary clock signal from a plurality of clock signals; feeding the primary clock signal to a numerical controlled oscillator; configuring the numerical controlled oscillator to generate a numerical controlled clock signal; and providing the numerical controlled clock signal as an internal system clock for the microcontroller.
Abstract:
A physical force capacitive touch sensor comprises a capacitive sensor element on a substrate, a physically deformable electrically insulating spacer over the capacitive sensor element and a conductive deformable plane over the physically deformable electrically insulating spacer. A protective deformable fascia may be placed over the conductive deformable plane to provide an environmental seal for physical and weather protection, but is not essential to operation of the capacitive touch sensor. Back lighting is accomplished through a light transmissive layer(s) in the capacitive touch sensor. When the conductive deformable plane is displaced toward the capacitive touch sensor element, the capacitance value of the capacitive touch sensor element changes and that change may be detected and used as an actuation signal.
Abstract:
A microcontroller has a numerical controlled oscillator receiving a primary clock signal and is configured to provide an internal system clock of the microcontroller. A method for operating a microcontroller performs the following steps: Selecting a primary clock signal from a plurality of clock signals; feeding the primary clock signal to a numerical controlled oscillator; configuring the numerical controlled oscillator to generate a numerical controlled clock signal; and providing the numerical controlled clock signal as an internal system clock for the microcontroller.
Abstract:
An integrated circuit including a processor configured to operate off a supply voltage being applied at one of a plurality of external pins; and internal input/output circuitry configured to select between the supply voltage and at least one other supply voltage being applied at another of the plurality of external pins.
Abstract:
A combination of capacitive, mutual capacitive, and inductive proximity and touch sensing is used to detect the presence and nature of nearby objects to a wireless device. When the proximity of metal or a user is sensed the output power of a Wi-Fi module in the device is reduced so as to prevent harm to the user and/or the Wi-Fi transmitter amplifier circuits. Inductive sensors located at the four corners of the wireless device are used to detect metal, and capacitive sensors are used to detect a capacitance change or shift due to the presence of a user's hand, body or metal. In addition, the capacitive sensors may be located at the four corners of the device and can measure changes in the mutual capacitance coupling between these capacitive sensors.
Abstract:
A plurality of capacitive proximity sensors on a substantially horizontal plane and in combination with a microcontroller are used to detect user gestures for Page Up/Down, Zoom In/Out, Move Up/Down/Right/Left, Rotation, etc., commands to a video display. The microcontroller is adapted to interpret the capacitive changes of the plurality of capacitive proximity sensors caused by the user gestures, and generate control signals based upon these gestures to control the visual content of the video display.
Abstract:
A microprocessor or microcontroller device may have a central processing unit (CPU), a data memory coupled with the CPU, wherein the data memory is divided into a plurality of memory banks, wherein a bank select register determines which memory bank is currently coupled with the CPU. Furthermore, a first and second set of special function registers are provided, wherein upon occurrence of a context switch either the first or the second set of special function register are selected as active context registers for the CPU and the respective other set of special function registers are selected as inactive context registers, wherein at least some of the registers of the active context registers are memory mapped to more than two memory banks of the data memory and wherein all registers of the inactive context registers are memory mapped to at least one memory location within the data memory.