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公开(公告)号：US10331610B2
公开(公告)日：2019-06-25
申请号：US15185257
申请日：2016-06-17
Applicant: Microchip Technology Incorporated
Inventor： Roshan Samuel , Janmichael Aberouette , Ward Brown , Chintan Desai , Brant Ivey , Razvan Dochia
Abstract: A universal asynchronous receiver/transmitter (UART) interface is disclosed. The UART interface may include a configurable asynchronous receiver and transmitter unit; and a configurable state machine, wherein the state machine allows configuration of the receiver and transmitter unit to support various baud rates and provide for start bit and stop bit configuration, wherein the state machine is further configurable to automatically support a plurality of communication protocols.
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公开(公告)号：US09261932B2
公开(公告)日：2016-02-16
申请号：US13844368
申请日：2013-03-15
Applicant: Microchip Technology Incorporated
Inventor： Michael Simmons , Igor Wojewoda , Roshan Samuel
CPC classification number: G06F1/24 , G06F8/656 , G06F9/4401 , G06F9/4406 , G06F9/4411 , G06F9/44505
Abstract: A method for hot swapping program code includes defining a predetermined range of new code from which to execute; identifying from the new code one or more system components which require a reinitialization or reset; reinitializing or resetting the one or more system components; and executing the new code.
Abstract translation: 一种用于热插拔程序代码的方法包括定义要执行的新代码的预定范围; 从新代码识别需要重新初始化或重置的一个或多个系统组件; 重新初始化或重新设置一个或多个系统组件; 并执行新的代码。
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公开(公告)号：US12061803B2
公开(公告)日：2024-08-13
申请号：US17499167
申请日：2021-10-12
Applicant: Microchip Technology Incorporated
Inventor： Roshan Samuel , Erick Pfeifer , John Day , Daniel Ujvari
IPC: G06F3/06
CPC classification number: G06F3/0623 , G06F3/0604 , G06F3/0652 , G06F3/0659 , G06F3/0679
Abstract: An apparatus may include a processor. The apparatus may include a memory communicatively coupled to the processor. The apparatus may include a memory control circuit (MCC). The MCC may be configured to define a protected portion of the memory, wherein the protected portion of the memory is configured for read-only access by the processor, increase a size of the protected portion of the memory, and, after the increase in size of the protected portion of the memory, prevent decreases of the size of the protected portion of the memory.
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公开(公告)号：US09733950B2
公开(公告)日：2017-08-15
申请号：US14209068
申请日：2014-03-13
Applicant: Microchip Technology Incorporated
Inventor： Roshan Samuel , Rodney Pesavento , Igor Wojewoda
IPC: G06F9/00 , G06F15/177 , G06F9/44
CPC classification number: G06F9/441 , G06F9/4408
Abstract: A multi-boot device capable of booting from a plurality of boot devices, each storing a boot image. The multi-boot device determines which boot device to load based on sequence numbers assigned to each of the boot devices. Some embodiments will make this determination using only hardware operations. The multi-boot device compares the sequence numbers of the available boot devices in order to determine the boot image to be loaded. The address of the selected boot image is then mapped to the device's default boot vector. The remaining images are likewise mapped to a secondary boot memory. The device then boots from the default boot vector. The user can change the boot device to be loaded by modifying one or more of the boot sequence numbers. The boot images can be updated without resetting the device by switching execution to and from boot images in the secondary boot memory.
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公开(公告)号：US20140281466A1
公开(公告)日：2014-09-18
申请号：US14209068
申请日：2014-03-13
Applicant: Microchip Technology Incorporated
Inventor： Roshan Samuel , Rodney Pesavento , Igor Wojewoda
IPC: G06F9/44
CPC classification number: G06F9/441 , G06F9/4408
Abstract: A multi-boot device capable of booting from a plurality of boot devices, each storing a boot image. The multi-boot device determines which boot device to load based on sequence numbers assigned to each of the boot devices. Some embodiments will make this determination using only hardware operations. The multi-boot device compares the sequence numbers of the available boot devices in order to determine the boot image to be loaded. The address of the selected boot image is then mapped to the device's default boot vector. The remaining images are likewise mapped to a secondary boot memory. The device then boots from the default boot vector. The user can change the boot device to be loaded by modifying one or more of the boot sequence numbers. The boot images can be updated without resetting the device by switching execution to and from boot images in the secondary boot memory.
Abstract translation: 一种能够从多个引导设备引导的多引导设备，每个引导设备存储引导映像。 多引导设备基于分配给每个引导设备的序列号确定要加载的引导设备。 一些实施例将仅使用硬件操作进行该确定。 多引导设备比较可用引导设备的序列号，以确定要加载的引导映像。 然后将所选引导映像的地址映射到设备的默认引导向量。 其余图像同样映射到辅助引导存储器。 然后，设备将从默认启动向量启动。 用户可以通过修改一个或多个引导序列号来更改要加载的引导设备。 可以更新引导映像，而不需要通过切换第二引导存储器中的引导映像的执行来重置设备。
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Patent Agency Ranking
公开(公告)号：US09825754B2
公开(公告)日：2017-11-21
申请号：US15188263
申请日：2016-06-21
Applicant: Microchip Technology Incorporated
Inventor： Roshan Samuel
CPC classification number: H04L7/0012 , G06F13/4295 , H04L7/005 , H04L41/0681 , H04L43/16 , H04L69/28
Abstract: A universal asynchronous receiver/transmitter (UART) module is disclosed. The UART module may include a receiver unit being clocked by a programmable receiver clock configured to sample an incoming data signal and comprising a counter clocked by said receiver clock, wherein the counter is reset to start counting with every falling edge of the data signal and to trigger a BRK detection signal if the counter reaches a programmable threshold value.
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公开(公告)号：US20160380798A1
公开(公告)日：2016-12-29
申请号：US15188464
申请日：2016-06-21
Applicant: Microchip Technology Incorporated
Inventor： Roshan Samuel
Abstract: A universal asynchronous receiver/transmitter (UART) module is disclosed. The UART module may include an edge detector coupled with a data line of the UART module, wherein the edge detector resets a counter on a rising and a falling edge.
Abstract translation: 公开了一种通用异步收发器（UART）模块。 UART模块可以包括与UART模块的数据线耦合的边缘检测器，其中边沿检测器在上升沿和下降沿复位计数器。
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公开(公告)号：US20220113879A1
公开(公告)日：2022-04-14
申请号：US17499167
申请日：2021-10-12
Applicant: Microchip Technology Incorporated
Inventor： Roshan Samuel , Erick Pfeifer , John Day , Daniel Ujvari
IPC: G06F3/06
Abstract: An apparatus may include a processor. The apparatus may include a memory communicatively coupled to the processor. The apparatus may include a memory control circuit (MCC). The MCC may be configured to define a protected portion of the memory, wherein the protected portion of the memory is configured for read-only access by the processor, increase a size of the protected portion of the memory, and, after the increase in size of the protected portion of the memory, prevent decreases of the size of the protected portion of the memory.
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公开(公告)号：US10425268B2
公开(公告)日：2019-09-24
申请号：US15188464
申请日：2016-06-21
Applicant: Microchip Technology Incorporated
Inventor： Roshan Samuel
Abstract: A universal asynchronous receiver/transmitter (UART) module is disclosed. The UART module may include an edge detector coupled with a data line of the UART module, wherein the edge detector resets a counter on a rising and a falling edge.
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公开(公告)号：US20160373238A1
公开(公告)日：2016-12-22
申请号：US15188263
申请日：2016-06-21
Applicant: Microchip Technology Incorporated
Inventor： Roshan Samuel
CPC classification number: H04L7/0012 , G06F13/4295 , H04L7/005 , H04L41/0681 , H04L43/16 , H04L69/28
Abstract: A universal asynchronous receiver/transmitter (UART) module is disclosed. The UART module may include a receiver unit being clocked by a programmable receiver clock configured to sample an incoming data signal and comprising a counter clocked by said receiver clock, wherein the counter is reset to start counting with every falling edge of the data signal and to trigger a BRK detection signal if the counter reaches a programmable threshold value.
Abstract translation: 公开了一种通用异步收发器（UART）模块。 UART模块可以包括由可编程接收器时钟计时的接收器单元，该可编程接收器时钟被配置为对输入数据信号进行采样并且包括由所述接收器时钟计时的计数器，其中计数器被复位以开始对数据信号的每个下降沿开始计数，并且 如果计数器达到可编程阈值，则触发BRK检测信号。
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