Boot sequencing for multi boot devices

    公开(公告)号:US09733950B2

    公开(公告)日:2017-08-15

    申请号:US14209068

    申请日:2014-03-13

    IPC分类号: G06F9/00 G06F15/177 G06F9/44

    CPC分类号: G06F9/441 G06F9/4408

    摘要: A multi-boot device capable of booting from a plurality of boot devices, each storing a boot image. The multi-boot device determines which boot device to load based on sequence numbers assigned to each of the boot devices. Some embodiments will make this determination using only hardware operations. The multi-boot device compares the sequence numbers of the available boot devices in order to determine the boot image to be loaded. The address of the selected boot image is then mapped to the device's default boot vector. The remaining images are likewise mapped to a secondary boot memory. The device then boots from the default boot vector. The user can change the boot device to be loaded by modifying one or more of the boot sequence numbers. The boot images can be updated without resetting the device by switching execution to and from boot images in the secondary boot memory.

    Boot Sequencing for Multi Boot Devices
    5.
    发明申请
    Boot Sequencing for Multi Boot Devices 有权
    多引导设备的引导排序

    公开(公告)号:US20140281466A1

    公开(公告)日:2014-09-18

    申请号:US14209068

    申请日:2014-03-13

    IPC分类号: G06F9/44

    CPC分类号: G06F9/441 G06F9/4408

    摘要: A multi-boot device capable of booting from a plurality of boot devices, each storing a boot image. The multi-boot device determines which boot device to load based on sequence numbers assigned to each of the boot devices. Some embodiments will make this determination using only hardware operations. The multi-boot device compares the sequence numbers of the available boot devices in order to determine the boot image to be loaded. The address of the selected boot image is then mapped to the device's default boot vector. The remaining images are likewise mapped to a secondary boot memory. The device then boots from the default boot vector. The user can change the boot device to be loaded by modifying one or more of the boot sequence numbers. The boot images can be updated without resetting the device by switching execution to and from boot images in the secondary boot memory.

    摘要翻译: 一种能够从多个引导设备引导的多引导设备,每个引导设备存储引导映像。 多引导设备基于分配给每个引导设备的序列号确定要加载的引导设备。 一些实施例将仅使用硬件操作进行该确定。 多引导设备比较可用引导设备的序列号,以确定要加载的引导映像。 然后将所选引导映像的地址映射到设备的默认引导向量。 其余图像同样映射到辅助引导存储器。 然后,设备将从默认启动向量启动。 用户可以通过修改一个或多个引导序列号来更改要加载的引导设备。 可以更新引导映像,而不需要通过切换第二引导存储器中的引导映像的执行来重置设备。

    UART With Line Activity Detector
    7.
    发明申请
    UART With Line Activity Detector 有权
    带线路检测器的UART

    公开(公告)号:US20160380798A1

    公开(公告)日:2016-12-29

    申请号:US15188464

    申请日:2016-06-21

    发明人: Roshan Samuel

    IPC分类号: H04L27/26 H04B1/16 H04L25/06

    摘要: A universal asynchronous receiver/transmitter (UART) module is disclosed. The UART module may include an edge detector coupled with a data line of the UART module, wherein the edge detector resets a counter on a rising and a falling edge.

    摘要翻译: 公开了一种通用异步收发器(UART)模块。 UART模块可以包括与UART模块的数据线耦合的边缘检测器,其中边沿检测器在上升沿和下降沿复位计数器。

    System with Increasing Protected Storage Area and Erase Protection

    公开(公告)号:US20220113879A1

    公开(公告)日:2022-04-14

    申请号:US17499167

    申请日:2021-10-12

    IPC分类号: G06F3/06

    摘要: An apparatus may include a processor. The apparatus may include a memory communicatively coupled to the processor. The apparatus may include a memory control circuit (MCC). The MCC may be configured to define a protected portion of the memory, wherein the protected portion of the memory is configured for read-only access by the processor, increase a size of the protected portion of the memory, and, after the increase in size of the protected portion of the memory, prevent decreases of the size of the protected portion of the memory.

    Independent UART BRK Detection
    10.
    发明申请
    Independent UART BRK Detection 有权
    独立UART BRK检测

    公开(公告)号:US20160373238A1

    公开(公告)日:2016-12-22

    申请号:US15188263

    申请日:2016-06-21

    发明人: Roshan Samuel

    摘要: A universal asynchronous receiver/transmitter (UART) module is disclosed. The UART module may include a receiver unit being clocked by a programmable receiver clock configured to sample an incoming data signal and comprising a counter clocked by said receiver clock, wherein the counter is reset to start counting with every falling edge of the data signal and to trigger a BRK detection signal if the counter reaches a programmable threshold value.

    摘要翻译: 公开了一种通用异步收发器(UART)模块。 UART模块可以包括由可编程接收器时钟计时的接收器单元,该可编程接收器时钟被配置为对输入数据信号进行采样并且包括由所述接收器时钟计时的计数器,其中计数器被复位以开始对数据信号的每个下降沿开始计数,并且 如果计数器达到可编程阈值,则触发BRK检测信号。