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公开(公告)号：US10797664B2
公开(公告)日：2020-10-06
申请号：US16568090
申请日：2019-09-11
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Akira Ide
IPC: H03F3/45
Abstract: Embodiments of the disclosure are drawn to apparatuses and methods for a chopper instrumentation amplifier. For a variety of applications, such as testing the resistance of connections between layers of a memory, it may be desirable to provide a high gain instrumentation amplifier. A chopper instrumentation amplifier may provide a high gain while allowing a wide range of common input voltages and a canceling an offset on the amplifier. An example chopper instrumentation amplifier of the present disclosure may include a plurality of amplifiers including chopper amplifiers and non-chopper amplifiers. The chopper amplifiers may use chopper circuits to cancel out an offset voltage of the amplifiers. Low pass filters may be used to minimize the impact of the chopper amplifiers.
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2.发明授权Semiconductor device capable of performing a read leveling and a write leveling based on an ambient temperature 有权能够基于环境温度执行读取调平和写入调平的半导体器件公开(公告)号：US09171588B2
公开(公告)日：2015-10-27
申请号：US14223928
申请日：2014-03-24
Applicant: Micron Technology, Inc.
Inventor： Akira Ide , Naoki Ogawa
CPC classification number: G11C7/04 , G11C5/04 , G11C7/1039 , G11C7/106 , G11C7/1066 , G11C7/1087 , G11C7/1093 , G11C7/222
Abstract: Disclosed herein is an apparatus that includes a first semiconductor chip including a first electrode, and a second semiconductor chip including a second electrode connected to the first electrode. One of the first and second semiconductor chips includes a first temperature sensor circuit generating a first detection signal, the first detection signal taking a first level when a temperature is equal to or higher than a first temperature, the first detection signal taking a second level when the temperature is lower than the first temperature; and a first delay code generation circuit outputting a first delay code signal in response to the first level of the first detection signal, and outputting a second delay code signal different from the first delay code signal in response to the second level of the first detection signal.
Abstract translation: 这里公开了一种装置，其包括：第一半导体芯片，包括第一电极;以及第二半导体芯片，包括与第一电极连接的第二电极。 第一和第二半导体芯片中的一个包括产生第一检测信号的第一温度传感器电路，当温度等于或高于第一温度时，第一检测信号取第一电平，第一检测信号取第二电平 温度低于第一温度; 以及响应于第一检测信号的第一电平而输出第一延迟码信号的第一延迟码产生电路，并且响应于第一检测信号的第二电平输出与第一延迟码信号不同的第二延迟码信号 。
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公开(公告)号：US11315917B2
公开(公告)日：2022-04-26
申请号：US17021755
申请日：2020-09-15
Applicant: Micron Technology, Inc.
Inventor： Akira Ide
Abstract: Embodiments of the disclosure are drawn to apparatuses and methods for testing the resistance of through silicon vias (TSVs) which may be used, for example, to couple multiple memory dies of a semiconductor memory device. A force amplifier may selectively provide a known current along a mesh wiring structure and through the TSV to be tested. The force amplifier may be positioned on a vacant area of the memory device, while the mesh wiring structure may be positioned in an area beneath the TSVs of the layers of the device. A chopper instrumentation amplifier may be selectively coupled to the TSV to be tested to amplify a voltage across the TSV generated by the current passing through the TSV. The chopper instrumentation amplifier may be capable of determining small resistance values of the TSV.
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公开(公告)号：US10797033B2
公开(公告)日：2020-10-06
申请号：US16121377
申请日：2018-09-04
Applicant: Micron Technology, Inc.
Inventor： Akira Ide
Abstract: Embodiments of the disclosure are drawn to apparatuses and methods for testing the resistance of through silicon vias (TSVs) which may be used, for example, to couple multiple memory dies of a semiconductor memory device. A force amplifier may selectively provide a known current along a mesh wiring structure and through the TSV to be tested. The force amplifier may be positioned on a vacant area of the memory device, while the mesh wiring structure may be positioned in an area beneath the TSVs of the layers of the device. A chopper instrumentation amplifier may be selectively coupled to the TSV to be tested to amplify a voltage across the TSV generated by the current passing through the TSV. The chopper instrumentation amplifier may be capable of determining small resistance values of the TSV.
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公开(公告)号：US20200096558A1
公开(公告)日：2020-03-26
申请号：US16138435
申请日：2018-09-21
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Akira Ide
IPC: G01R31/28 , H01L25/065
Abstract: Embodiments of the disclosure are drawn to apparatuses and methods for testing through silicon vias (TSVs) which may be used, for example, to couple layers of a semiconductor memory device. The TSVs and/or the die around the TSVs may require testing. A switch circuit may be used to selectively couple one or more test circuits to an amplifier. The test circuits may generate a voltage that is related to one or more parameters of the TSV being tested. The amplifier may amplify the voltage, which may be used to determine if the TSV passes the particular test determined by the test circuit selected by the switch circuit. The switch circuit and/or other components of the test circuits may be controlled by control signals to determine the operation of a particular test.
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Patent Agency Ranking
公开(公告)号：US10468386B1
公开(公告)日：2019-11-05
申请号：US16183961
申请日：2018-11-08
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Homare Sato , Chikara Kondo , Akira Ide
IPC: H01L25/065 , G01R31/28
Abstract: An apparatus including through substrate vias (TSVs) used to interconnect stacked chips is described. The apparatus according to an embodiment includes a plurality of first selection lines each extending in a first direction; a plurality of second selection lines each extending in a second direction to cross the plurality of first selection lines; and a plurality of a TSV units disposed in intersections of the plurality of first selection lines and the plurality of second selection lines, respectively. Each TSV unit of the plurality of TSV units includes a TSV; a switch coupled to the TSV; and a selection circuit. The selection circuit is configured to control a switching state of the switch responsive to each of an associated one of the plurality of first selection lines and an associated one of the plurality of second selection lines being set to an active level.
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公开(公告)号：US10432158B1
公开(公告)日：2019-10-01
申请号：US16052586
申请日：2018-08-01
Applicant: Micron Technology, Inc.
Inventor： Akira Ide
IPC: H03F3/45
Abstract: Embodiments of the disclosure are drawn to apparatuses and methods for a chopper instrumentation amplifier. For a variety of applications, such as testing the resistance of connections between layers of a memory, it may be desirable to provide a high gain instrumentation amplifier. A chopper instrumentation amplifier may provide a high gain while allowing a wide range of common input voltages and a canceling an offset on the amplifier. An example chopper instrumentation amplifier of the present disclosure may include a plurality of amplifiers including chopper amplifiers and non-chopper amplifiers. The chopper amplifiers may use chopper circuits to cancel out an offset voltage of the amplifiers. Low pass filters may be used to minimize the impact of the chopper amplifiers.
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公开(公告)号：US11255902B2
公开(公告)日：2022-02-22
申请号：US16138435
申请日：2018-09-21
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Akira Ide
IPC: G01R31/28 , H01L25/065
Abstract: Embodiments of the disclosure are drawn to apparatuses and methods for testing through silicon vias (TSVs) which may be used, for example, to couple layers of a semiconductor memory device. The TSVs and/or the die around the TSVs may require testing. A switch circuit may be used to selectively couple one or more test circuits to an amplifier. The test circuits may generate a voltage that is related to one or more parameters of the TSV being tested. The amplifier may amplify the voltage, which may be used to determine if the TSV passes the particular test determined by the test circuit selected by the switch circuit. The switch circuit and/or other components of the test circuits may be controlled by control signals to determine the operation of a particular test.
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公开(公告)号：US20200044617A1
公开(公告)日：2020-02-06
申请号：US16568090
申请日：2019-09-11
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Akira Ide
IPC: H03F3/45
Abstract: Embodiments of the disclosure are drawn to apparatuses and methods for a chopper instrumentation amplifier. For a variety of applications, such as testing the resistance of connections between layers of a memory, it may be desirable to provide a high gain instrumentation amplifier. A chopper instrumentation amplifier may provide a high gain while allowing a wide range of common input voltages and a canceling an offset on the amplifier. An example chopper instrumentation amplifier of the present disclosure may include a plurality of amplifiers including chopper amplifiers and non-chopper amplifiers. The chopper amplifiers may use chopper circuits to cancel out an offset voltage of the amplifiers. Low pass filters may be used to minimize the impact of the chopper amplifiers.
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公开(公告)号：US20200075568A1
公开(公告)日：2020-03-05
申请号：US16121377
申请日：2018-09-04
Applicant: Micron Technology, Inc.
Inventor： Akira Ide
Abstract: Embodiments of the disclosure are drawn to apparatuses and methods for testing the resistance of through silicon vias (TSVs) which may be used, for example, to couple multiple memory dies of a semiconductor memory device. A force amplifier may selectively provide a known current along a mesh wiring structure and through the TSV to be tested. The force amplifier may be positioned on a vacant area of the memory device, while the mesh wiring structure may be positioned in an area beneath the TSVs of the layers of the device. A chopper instrumentation amplifier may be selectively coupled to the TSV to be tested to amplify a voltage across the TSV generated by the current passing through the TSV. The chopper instrumentation amplifier may be capable of determining small resistance values of the TSV.
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