公开(公告)号：US20240078048A1

公开(公告)日：2024-03-07

申请号：US18506505

申请日：2023-11-10

Applicant: Micron Technology, Inc.

Inventor： Juane Li ,  Fangfang Zhu ,  Jason Duong ,  Chih-Kuo Kao ,  Jiangli Zhu

IPC: G06F3/06

CPC classification number: G06F3/0659 ,  G06F3/0604 ,  G06F3/0644 ,  G06F3/0679

Abstract: A partition command is stored at free memory address location of the local memory corresponding to an index of an address array. The index is associated with an entry in the address array. A last entry in a linked list of entries from a tail register is obtained based on an allocation of the stored partition command to a partition command queue of a plurality of partition command queues. The tail register corresponds to the partition command queue of the plurality of partition command queues. Responsive to obtaining the last entry in the linked list, an entry to the linked list after the last entry is appended. The entry corresponds to the index of the address array associated with the stored partition command.

公开(公告)号：US11726815B2

公开(公告)日：2023-08-15

申请号：US16913751

申请日：2020-06-26

Applicant: Micron Technology, Inc.

Inventor： Jason Duong ,  Chih-Kuo Kao ,  Jiangli Zhu ,  Ying Yu Tai ,  Wei Wang

IPC: G06F3/06 ,  G06F9/48 ,  G06F9/38

CPC classification number: G06F9/4881 ,  G06F3/0611 ,  G06F3/0644 ,  G06F3/0659 ,  G06F3/0683 ,  G06F9/3855

Abstract: Methods, systems, and devices for scheduling command execution are described. A memory sub-system can schedule command execution according to a type of command received. For a read operation, a memory sub-system can receive read commands for multiple memory dice. The memory sub-system can select a first memory die and execute a first set of read commands associated with the first memory die. The memory sub-system can then select a second memory die and execute a second set of read commands associated with the second memory die.

公开(公告)号：US11847349B2

公开(公告)日：2023-12-19

申请号：US17445474

申请日：2021-08-19

Applicant: Micron Technology, Inc.

Inventor： Juane Li ,  Fangfang Zhu ,  Jason Duong ,  Chih-Kuo Kao ,  Jiangli Zhu

IPC: G06F3/06

CPC classification number: G06F3/0659 ,  G06F3/0604 ,  G06F3/0644 ,  G06F3/0679

Abstract: A partition command is stored at free memory address location of the local memory corresponding to an index of an address array. The index is associated with an entry in the address array. A last entry in a linked list of entries from a tail register is obtained based on an allocation of the stored partition command to a partition command queue of a plurality of partition command queues. The tail register corresponds to the partition command queue of the plurality of partition command queues. Responsive to obtaining the last entry in the linked list, an entry to the linked list after the last entry is appended. The entry corresponds to the index of the address array associated with the stored partition command.

公开(公告)号：US20230056808A1

公开(公告)日：2023-02-23

申请号：US17445481

申请日：2021-08-19

Applicant: Micron Technology, Inc.

Inventor： Juane Li ,  Jason Duong ,  Fangfang Zhu ,  Chih-Kuo Kao ,  Jiangli Zhu

IPC: G06F3/06 ,  G11C13/00

Abstract: A first command directed to a first package of a plurality of memory packages, wherein the first command is issued to a command processor to be applied to the first package is received. A total number of pending commands directed to the first package satisfies a first threshold criterion is determined. Responsive to determining that the total number of pending commands directed to the first package satisfies the first threshold criterion, whether a second command directed to a second package is requesting transmission is determined. Responsive to the second command directed to the second package is requesting transmission, whether the first command comprises a write command is determined. Responsive to determining that the first command comprises a write command, execute a command directed to the second package.

公开(公告)号：US20230056287A1

公开(公告)日：2023-02-23

申请号：US17445474

申请日：2021-08-19

Applicant: Micron Technology, Inc.

Inventor： Juane Li ,  Fangfang Zhu ,  Jason Duong ,  Chih-Kuo Kao ,  Jiangli Zhu

IPC: G06F3/06

Abstract: A partition command is stored at free memory address location of the local memory corresponding to an index of an address array. The index is associated with an entry in the address array. A last entry in a linked list of entries from a tail register is obtained based on an allocation of the stored partition command to a partition command queue of a plurality of partition command queues. The tail register corresponds to the partition command queue of the plurality of partition command queues. Responsive to obtaining the last entry in the linked list, an entry to the linked list after the last entry is appended. The entry corresponds to the index of the address array associated with the stored partition command.

公开(公告)号：US20240126480A1

公开(公告)日：2024-04-18

申请号：US18531329

申请日：2023-12-06

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Jason Duong ,  Fangfang Zhu ,  Jiangli Zhu ,  Juane Li ,  Chih-Kuo Kao

IPC: G06F3/06

CPC classification number: G06F3/0659 ,  G06F3/0604 ,  G06F3/0679

Abstract: A system can include a memory device and a processing device coupled with the memory device. The processing device can receive, from a host system, a command of a type; determine a weighted count of the command according to the type of the command; track, based on the weighted count, a first count of commands of the type; determine whether the first count of commands of the type satisfies a threshold criterion for commands of the type; and responsive to determining that the first count of commands of the type satisfies the threshold criterion, transmit a notification to the host system to refrain from transmitting commands of the type.

公开(公告)号：US11893280B2

公开(公告)日：2024-02-06

申请号：US17459343

申请日：2021-08-27

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Jason Duong ,  Fangfang Zhu ,  Jiangli Zhu ,  Juane Li ,  Chih-Kuo Kao

IPC: G06F3/06

CPC classification number: G06F3/0659 ,  G06F3/0604 ,  G06F3/0679

Abstract: A system can include a memory device and a processing device coupled with the memory device. The processing device can receive a command of a first type from a host system. The processing device can select a threshold criterion for the command of the first type based on a count of commands of a second type. The processing device can determine whether a second count of commands of the first type satisfies the threshold criterion and in response to the second count satisfying the threshold criterion, the processing logic can transmit a notification to the host system to refrain from transmitting the commands of the first type.

公开(公告)号：US20230066419A1

公开(公告)日：2023-03-02

申请号：US17464186

申请日：2021-09-01

Applicant: Micron Technology, Inc.

Inventor： Bharani Rajendiran ,  Jason Duong ,  Chih-Kuo Kao ,  Fangfang Zhu

IPC: G06F3/06 ,  G11C11/408 ,  G11C11/4094

Abstract: A memory access command to be performed on a die of a memory device is received, wherein the memory access command comprises a base partition number and a base page address. The memory access command is converted into a plurality of commands based on a number of partitions associated with the die. A respective partition number derived from the base partition number is determined for each command of the plurality of commands. A respective page address associated with each command of the plurality of commands is determined using the base page address. The plurality of commands is executed using, for each command of the plurality of commands, the respective partition number and the respective page address.

公开(公告)号：US20230064168A1

公开(公告)日：2023-03-02

申请号：US17459343

申请日：2021-08-27

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Jason Duong ,  Fangfang Zhu ,  Jiangli Zhu ,  Juane Li ,  Chih-Kuo Kao

IPC: G06F3/06

Abstract: A system can include a memory device and a processing device coupled with the memory device. The processing device can receive a command of a first type from a host system. The processing device can select a threshold criterion for the command of the first type based on a count of commands of a second type. The processing device can determine whether a second count of commands of the first type satisfies the threshold criterion and in response to the second count satisfying the threshold criterion, the processing logic can transmit a notification to the host system to refrain from transmitting the commands of the first type.

公开(公告)号：US20210271421A1

公开(公告)日：2021-09-02

申请号：US17303169

申请日：2021-05-21

Applicant: Micron Technology, Inc.

Inventor： Jiangli Zhu ,  Wei Wang ,  Ying Yu Tai ,  Jason Duong ,  Chih-Kuo Kao

IPC: G06F3/06

Abstract: A processing device in a memory system determines that a number of commands from an active queue that have been executed on a memory device does not satisfy an executed transaction threshold criterion, that a number of pending commands in an inactive queue satisfies a first promotion threshold criterion, and that a number of pending commands in the active queue does not satisfy a second promotion threshold criterion. In response, the processing device switches an execution grant from the active queue to the inactive queue.