公开(公告)号：US20240194264A1

公开(公告)日：2024-06-13

申请号：US18515906

申请日：2023-11-21

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Dmitry Mikulik ,  Leo Lukose ,  Ramanathan Gandhi

IPC: G11C16/04 ,  G11C5/06 ,  H10B41/27 ,  H10B41/35 ,  H10B43/27 ,  H10B43/35

CPC classification number: G11C16/0483 ,  G11C5/063 ,  H10B41/27 ,  H10B41/35 ,  H10B43/27 ,  H10B43/35

Abstract: Memory cells, and memories and memory array structures containing such memory cells, might include a control gate, a channel, a gate dielectric between the channel and the control gate, a charge-storage node between the gate dielectric and the control gate, a charge-blocking material between the charge-storage node and the control gate, a laminated dielectric between the charge-blocking material and the control gate, and a high-K dielectric between the laminated dielectric and the control gate, wherein the laminated dielectric comprises an instance of a first dielectric material between the charge-blocking material and the high-K dielectric and an instance of a second dielectric material between the instance of the first dielectric material and the high-K dielectric, and wherein the instance of the first dielectric material has a higher oxygen areal density than an oxygen areal density of the instance of the second dielectric material.