公开(公告)号：US11764152B1

公开(公告)日：2023-09-19

申请号：US17714797

申请日：2022-04-06

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Harunobu Kondo ,  Kazuteru Ishizuka ,  Wataru Nobehara ,  Ryosuke Yatsushiro ,  Makoto Saito

IPC: H01L23/528 ,  H01L23/522

CPC classification number: H01L23/5283 ,  H01L23/5226

Abstract: Disclosed herein is an apparatus that includes a semiconductor substrate having a main surface extending in a first direction and a second direction different from the first direction and a conductive pattern formed over the main surface of the semiconductor substrate. The conductive pattern includes a first section extending in the first direction, a second section extending in the second direction, and a third section connected between the first and second sections. The third section of the conductive pattern has a first slit extending in a third direction different from the first and second directions.

公开(公告)号：US11264068B2

公开(公告)日：2022-03-01

申请号：US17122801

申请日：2020-12-15

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Ryosuke Yatsushiro ,  Seiji Narui

IPC: G11C5/06 ,  G11C7/22 ,  G11C8/18 ,  G11C7/10 ,  H01L25/065 ,  H01L25/18

Abstract: Apparatuses for providing a clock signal for a semiconductor device are described. An example apparatus includes a chip including a first clock tree and a second clock tree. The first clock tree includes a first wiring segment extending in a first direction and a second wiring segment extending in a second direction perpendicular to the first direction and coupled the first wiring segment. The second clock tree includes a third wiring segment extending in the second direction, a fourth wiring segment extending in the first direction and coupled to the third wiring segment, and a fifth wiring segment extending in the second direction and coupled to the fourth wiring segment.

公开(公告)号：US10885959B1

公开(公告)日：2021-01-05

申请号：US16591461

申请日：2019-10-02

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Ryosuke Yatsushiro ,  Seiji Narui

IPC: G11C5/06 ,  G11C7/22 ,  G11C8/18 ,  G11C7/10 ,  H01L25/065 ,  H01L25/18

Abstract: Apparatuses for providing a clock signal for a semiconductor device are described. An example apparatus includes a chip including a first clock tree and a second clock tree. The first clock tree includes a first wiring segment extending in a first direction and a second wiring segment extending in a second direction perpendicular to the first direction and coupled the first wiring segment. The second clock tree includes a third wiring segment extending in the second direction, a fourth wiring segment extending in the first direction and coupled to the third wiring segment, and a fifth wiring segment extending in the second direction and coupled to the fourth wiring segment.

公开(公告)号：US20230326852A1

公开(公告)日：2023-10-12

申请号：US17714797

申请日：2022-04-06

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Harunobu Kondo ,  Kazuteru Ishizuka ,  Wataru Nobehara ,  Ryosuke Yatsushiro ,  Makoto Saito

IPC: H01L23/528 ,  H01L23/522

CPC classification number: H01L23/5283 ,  H01L23/5226

Abstract: Disclosed herein is an apparatus that includes a semiconductor substrate having a main surface extending in a first direction and a second direction different from the first direction and a conductive pattern formed over the main surface of the semiconductor substrate. The conductive pattern includes a first section extending in the first direction, a second section extending in the second direction, and a third section connected between the first and second sections. The third section of the conductive pattern has a first slit extending in a third direction different from the first and second directions.

公开(公告)号：US20210104269A1

公开(公告)日：2021-04-08

申请号：US17122801

申请日：2020-12-15

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Ryosuke Yatsushiro ,  Seiji Narui

IPC: G11C7/22 ,  G11C7/10 ,  H01L25/065 ,  H01L25/18 ,  G11C8/18

Abstract: Apparatuses for providing a clock signal for a semiconductor device are described. An example apparatus includes a chip including a first clock tree and a second clock tree. The first clock tree includes a first wiring segment extending in a first direction and a second wiring segment extending in a second direction perpendicular to the first direction and coupled the first wiring segment. The second clock tree includes a third wiring segment extending in the second direction, a fourth wiring segment extending in the first direction and coupled to the third wiring segment, and a fifth wiring segment extending in the second direction and coupled to the fourth wiring segment.