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公开(公告)号：US20170352644A1
公开(公告)日：2017-12-07
申请号：US15174019
申请日：2016-06-06
Applicant: Micron Technology, Inc.
Inventor： Feng Lin , Yuanzhong Wan
IPC: H01L25/065 , G11C11/4076 , G11C11/4091
CPC classification number: H01L25/0657 , G11C7/1066 , G11C7/1093 , G11C7/222 , G11C11/4076 , G11C11/4091 , H01L2225/06541 , H01L2225/06565
Abstract: Apparatuses and methods are provided for scalable memory. An example apparatus comprises a logic component, a plurality of memory components adjacent to and coupled to one another and the logic component, a plurality of memory component programmable delay lines (PDLs), of the plurality of memory component PDLs associated with a respective one of the plurality of memory components, and a logic component programmable delay line (LPDL) coupled to the logic component and each of the plurality of memory component PDLs.
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公开(公告)号：US20190252356A1
公开(公告)日：2019-08-15
申请号：US16397038
申请日：2019-04-29
Applicant: Micron Technology, Inc.
Inventor： Feng Lin , Yuanzhong Wan
IPC: H01L25/065 , G11C11/4076 , G11C11/4091 , G11C7/10
CPC classification number: H01L25/0657 , G11C7/1066 , G11C7/1093 , G11C7/222 , G11C11/4076 , G11C11/4091 , H01L2225/06541 , H01L2225/06565
Abstract: Apparatuses and methods are provided for scalable memory. An example apparatus comprises a logic component, a plurality of memory components adjacent to and coupled to one another and the logic component, a plurality of memory component programmable delay lines (PDLs), of the plurality of memory component PDLs associated with a respective one of the plurality of memory components, and a logic component programmable delay line (LPDL) coupled to the logic component and each of the plurality of memory component PDLs.
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3.发明授权公开(公告)号：US10250139B2
公开(公告)日：2019-04-02
申请号：US15087271
申请日：2016-03-31
Applicant: Micron Technology, Inc.
Inventor： Yuanzhong Wan , Dong Pan
Abstract: According to one embodiment of this disclosure, an apparatus is disclosed. The apparatus includes a voltage regulator configured to produce a regulated voltage, a plurality of current circuits coupled in parallel between an output node and a power node, each of the plurality of current circuits including first and second transistors coupled in series, the first transistor of each of the plurality of current circuits being biased with the regulated voltage, and a control circuit configured to activate the second transistor of selected one or ones of the plurality of current circuits responsive, at least in part, to a voltage at the output node.
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公开(公告)号：US20190096855A1
公开(公告)日：2019-03-28
申请号：US16199460
申请日：2018-11-26
Applicant: Micron Technology, Inc.
Inventor： Feng Lin , Yuanzhong Wan
IPC: H01L25/065 , G11C11/4076 , G11C7/10 , G11C11/4091 , G11C7/22
Abstract: Apparatuses and methods are provided for scalable memory. An example apparatus comprises a logic component, a plurality of memory components adjacent to and coupled to one another and the logic component, a plurality of memory component programmable delay lines (PDLs), of the plurality of memory component PDLs associated with a respective one of the plurality of memory components, and a logic component programmable delay line (LPDL) coupled to the logic component and each of the plurality of memory component PDLs.
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公开(公告)号：US10446528B2
公开(公告)日：2019-10-15
申请号：US16397038
申请日：2019-04-29
Applicant: Micron Technology, Inc.
Inventor： Feng Lin , Yuanzhong Wan
IPC: G11C7/02 , G11C11/00 , H01L25/065 , G11C11/4076 , G11C11/4091 , G11C7/10 , G11C7/22
Abstract: Apparatuses and methods are provided for scalable memory. An example apparatus comprises a logic component, a plurality of memory components adjacent to and coupled to one another and the logic component, a plurality of memory component programmable delay lines (PDLs), of the plurality of memory component PDLs associated with a respective one of the plurality of memory components, and a logic component programmable delay line (LPDL) coupled to the logic component and each of the plurality of memory component PDLs.
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Patent Agency Ranking
6.发明授权公开(公告)号：US10437271B2
公开(公告)日：2019-10-08
申请号：US16020510
申请日：2018-06-27
Applicant: Micron Technology, Inc.
Inventor： Yuanzhong Wan , Dong Pan
IPC: G05F1/46
Abstract: Systems and apparatuses for a configurable, temperature dependent reference voltage generator are provided. An example apparatus includes control logic configured receive temperature data, and produce a signal, based on the temperature data, indicative of the temperature data, a temperature dependence and a temperature slope. The apparatus may also include a temperature slope reference generator configured to produce a reference voltage having the temperature dependence and the temperature slope, based on the signal from the control logic.
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7.发明申请公开(公告)号：US20190190384A1
公开(公告)日：2019-06-20
申请号：US16283230
申请日：2019-02-22
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Yuanzhong Wan , Dong Pan
Abstract: According to one embodiment of this disclosure, an apparatus is disclosed. The apparatus includes a voltage regulator configured to produce a regulated voltage, a plurality of current circuits coupled in parallel between an output node and a power node, each of the plurality of current circuits including first and second transistors coupled in series, the first transistor of each of the plurality of current circuits being biased with the regulated voltage, and a control circuit configured to activate the second transistor of selected one or ones of the plurality of current circuits responsive, at least in part, to a voltage at the output node.
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8.发明申请公开(公告)号：US20180095486A1
公开(公告)日：2018-04-05
申请号：US15283605
申请日：2016-10-03
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Yuanzhong Wan , Dong Pan
Abstract: Systems and apparatuses for a configurable, temperature dependent reference voltage generator are provided. An example apparatus includes control logic configured receive temperature data, and produce a signal, based on the temperature data, indicative of the temperature data, a temperature dependence and a temperature slope. The apparatus may also include a temperature slope reference generator configured to produce a reference voltage having the temperature dependence and the temperature slope, based on the signal from the control logic.
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9.发明申请公开(公告)号：US20170288542A1
公开(公告)日：2017-10-05
申请号：US15087271
申请日：2016-03-31
Applicant: Micron Technology, Inc.
Inventor： Yuanzhong Wan , Dong Pan
Abstract: According to one embodiment of this disclosure, an apparatus is disclosed. The apparatus includes a voltage regulator configured to produce a regulated voltage, a plurality of current circuits coupled in parallel between an output node and a power node, each of the plurality of current circuits including first and second transistors coupled in series, the first transistor of each of the plurality of current circuits being biased with the regulated voltage, and a control circuit configured to activate the second transistor of selected one or ones of the plurality of current circuits responsive, at least in part, to a voltage at the output node.
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10.发明授权公开(公告)号：US10658929B2
公开(公告)日：2020-05-19
申请号：US16283230
申请日：2019-02-22
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Yuanzhong Wan , Dong Pan
Abstract: According to one embodiment of this disclosure, an apparatus is disclosed. The apparatus includes a voltage regulator configured to produce a regulated voltage, a plurality of current circuits coupled in parallel between an output node and a power node, each of the plurality of current circuits including first and second transistors coupled in series, the first transistor of each of the plurality of current circuits being biased with the regulated voltage, and a control circuit configured to activate the second transistor of selected one or ones of the plurality of current circuits responsive, at least in part, to a voltage at the output node.
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