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公开(公告)号：US06259693B1
公开(公告)日：2001-07-10
申请号：US08919830
申请日：1997-08-28
IPC分类号： H04Q1100
CPC分类号： H04L49/405 , H04L49/255 , H04L49/3081 , H04L2012/5627 , H04L2012/5635 , H04Q11/0478
摘要： An apparatus and method for enabling the combination of multiple streams of data cells into a single thread. By enabling plural input ports of an intermediate device to access a single parallel output port of the device, plural network switch elements share a single thread through a switch fabric. For instance, the method and apparatus permit interleaving the relatively low bandwidth cell outputs of two ATM network switch central control processors onto a single thread routed through an interconnected switch fabric. Certain of these cells are received from the switch fabric at a parallel input of the intermediate device, then routed to one of plural serial output ports. Pacing of cells provided to the plural serial input ports prevents exceeding the shared thread bandwidth.
摘要翻译： 一种用于使多个数据单元流组合成单个线程的装置和方法。 通过使中间设备的多个输入端口能够访问设备的单个并行输出端口，多个网络交换机单元通过交换结构共享单个线程。 例如，该方法和装置允许将两个ATM网络交换机中央控制处理器的相对低带宽的小区输出交织到通过互连的交换结构路由的单个线程上。 这些单元中的某些在中间设备的并行输入处从交换结构接收，然后被路由到多个串行输出端口中的一个。 提供给多个串行输入端口的单元的起搏防止超过共享线程带宽。
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公开(公告)号：US6078595A
公开(公告)日：2000-06-20
申请号：US920250
申请日：1997-08-28
申请人： John Patrick Jones , Raymond Schmidt , Eric L. Reed , Patrick L. DeAngelis , Mahesh N. Ganmukhi , Thomas A. Hoch , Brian Branscomb
发明人： John Patrick Jones , Raymond Schmidt , Eric L. Reed , Patrick L. DeAngelis , Mahesh N. Ganmukhi , Thomas A. Hoch , Brian Branscomb
CPC分类号： H04Q11/0421 , H04J3/0688
摘要： A data communications switch and method of operation are presently disclosed enabling flexible, selectable provision of a common timing signal for synchronized external communication through physical layer interfaces with other network devices, synchronized internal communications within the switch, and for uninterrupted synchronization of such communications. Synchronization of external communications is enabled by programmable selection from among plural potential timing references at redundant timing modules (TMs). An active TM provides a primary external synchronization clock; a standby TM provides a redundant timing function. Both TMs access the same references. A state signal indicates which synchronization clock is active. External interfaces derive timing from this distributed clock. Synchronized internal timing is provided by an internal clock and phase-locked loop (PLL) on each TM. The clock/PLL timing signal output is routed to other switch elements, enabling synchronized internal data transfer. Both interconnected TMs actively generate clock signals for external and internal use, enabling seamless timing switchover should conditions warrant a change in TMs.
摘要翻译： 目前公开了一种数据通信开关和操作方法，使得能够灵活地，可选择地提供用于通过与其他网络设备的物理层接口同步的外部通信，交换机内的同步内部通信以及这种通信的不间断同步的公共定时信号。 通过在冗余定时模块（TM）的多个潜在定时参考中的可编程选择来实现外部通信的同步。 主动TM提供主要的外部同步时钟; 备用TM提供冗余定时功能。 两个TM都访问相同的引用。 状态信号指示哪个同步时钟是活动的。 外部接口从该分布式时钟导出时序。 同步的内部时序由每个TM上的内部时钟和锁相环（PLL）提供。 时钟/ PLL定时信号输出被路由到其他开关元件，实现同步的内部数据传输。 两个互连的TM主动地产生用于外部和内部使用的时钟信号，如果条件需要TM变化，则实现无缝时序切换。
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3.发明授权Electronic interconnection method and apparatus for minimizing propagation delays 失效用于最小化传播延迟的电子互连方法和装置
公开(公告)号：US6015300A
公开(公告)日：2000-01-18
申请号：US919825
申请日：1997-08-28
CPC分类号： H05K1/14 , G06F13/409 , H05K7/1459
摘要： A module interconnection system which minimizes electronic signal propagation delays is disclosed. The module interconnection system includes a backplane, a first plurality of connectors arranged in a side by side generally parallel arrangement, and a second plurality of connectors arranged in a side by side generally parallel arrangement. In a preferred embodiment, the second plurality of connectors are mounted on the backplane at right angles to the first plurality of connectors so as provide short routing paths between each of the second plurality of connectors and at least one of the first plurality of connectors. Point-to-point signal interconnections are selectively utilized to provide data paths between selected contacts of at least one of the first plurality of connectors and selected contacts of the second plurality of connectors. The above described interconnection apparatus permits high speed data communication between modules disposed in at least one of said first plurality of connectors and at least one module disposed in said second plurality of connectors.
摘要翻译： 公开了使电子信号传播延迟最小化的模块互连系统。 模块互连系统包括背板，并排布置为大致平行布置的第一多个连接器和大体平行布置并排布置的第二多个连接器。 在优选实施例中，第二多个连接器以与第一多个连接器成直角的方式安装在背板上，从而在第二多个连接器中的每一个与第一多个连接器中的至少一个之间提供短路由路径。 点对点信号互连被选择性地用于在第一多个连接器中的至少一个连接器和第二多个连接器的选定触点之间的选定触点之间提供数据路径。 上述互连装置允许设置在所述第一多个连接器中的至少一个中的模块和设置在所述第二多个连接器中的至少一个模块之间的高速数据通信。
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4.发明授权Apparatus and method for efficiently transferring ATM cells across a backplane in a network switch 失效在网络交换机中通过背板有效地传送ATM信元的装置和方法公开(公告)号：US06192046B1
公开(公告)日：2001-02-20
申请号：US08921980
申请日：1997-08-28
IPC分类号： H04L1228
CPC分类号： H04L49/405 , H04L49/255 , H04L49/3081 , H04L2012/5635 , H04Q11/0478
摘要： The present invention is directed to an apparatus and method for efficiently transferring asynchronous transfer mode (ATM) cells across a backplane in a network switch. The present invention is realized through an electrical apparatus that converts parallel data that is received on parallel data input ports to serial data that is transmitted on serial data output ports. The parallel data that is received on each parallel data input port is divided and transmitted from a corresponding pair of serial data output ports. The electrical apparatus also converts serial data that is received on serial data input ports to parallel data that is transmitted on parallel data output ports. The serial data that is received on a corresponding pair of serial data input ports is combined and transmitted from a parallel data output port.
摘要翻译： 本发明涉及一种用于在网络交换机中跨背板有效地传输异步传输模式（ATM）小区的装置和方法。 本发明通过将并行数据输入端口接收的并行数据转换为在串行数据输出端口上发送的串行数据的电气设备来实现。 在每个并行数据输入端口接收的并行数据被分配并从对应的一对串行数据输出端口发送。 电气设备还将串行数据输入端口接收的串行数据转换为并行数据输出端口上发送的并行数据。 在对应的串行数据输入端口上接收的串行数据被并入并从并行数据输出端口发送。
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公开(公告)号：US06667959B1
公开(公告)日：2003-12-23
申请号：US09459434
申请日：1999-12-13
IPC分类号： H04J314
CPC分类号： H04L43/50 , H04L49/552 , H04L49/555
摘要： A method is presented which allows for the testing and verification of an off-line switch fabric used in network switch having redundant switch fabrics. A special test cell is directed to the off-line switch fabric, loops through a portion of the switching core of the off-line switch fabric, and is returned from the off-line switch fabric. A plurality of test cells can be used to provide full mesh connectivity checking of the off-line switch fabric. Testing is accomplished without need for reconfiguration of the off-line switch fabric, and the off-line switch fabric is available for use immediately upon determination of the need therefor.
摘要翻译： 提出了一种方法，其允许用于具有冗余交换结构的网络交换机中使用的离线交换结构的测试和验证。 特殊测试单元被引导到离线交换结构，环绕离线交换结构的交换核心的一部分，并且从离线交换结构返回。 可以使用多个测试单元来提供离线交换结构的全网状连接性检查。 测试完成而不需要重新配置离线交换结构，并且离线交换结构在确定其需要时可以立即使用。
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