公开(公告)号：US20120228635A1

公开(公告)日：2012-09-13

申请号：US13409820

申请日：2012-03-01

申请人： Makoto MIZUKAMI ,  Masamu Kamaga ,  Kazuto Takao

发明人： Makoto MIZUKAMI ,  Masamu Kamaga ,  Kazuto Takao

IPC分类号： H01L29/161

CPC分类号： H01L29/868 ,  H01L29/1608

摘要： A semiconductor rectifier device using an SiC semiconductor at least includes: an anode electrode; an anode area that adjoins the anode electrode and is made of a second conductivity type semiconductor; a drift layer that adjoins the anode area and is made of a first conductivity type semiconductor having a low concentration; a minority carrier absorption layer that adjoins the drift layer and is made of a first conductivity type semiconductor having a higher concentration than that of the drift layer; a high-resistance semiconductor area that adjoins the minority carrier absorption layer, has less thickness than the drift layer and is made of a first conductivity type semiconductor having a concentration lower than that of the minority carrier absorption layer; a cathode contact layer that adjoins the semiconductor area; and a cathode electrode.

摘要翻译： 使用SiC半导体的半导体整流装置至少包括：阳极电极; 邻接阳极电极并由第二导电型半导体制成的阳极区域; 漂移层，其邻接阳极区域并由具有低浓度的第一导电型半导体制成; 与漂移层相邻并且由比漂移层的浓度高的第一导电型半导体制成的少数载流子吸收层; 与少数载流子吸收层相邻的高电阻半导体区域的厚度小于漂移层的厚度，并且由具有低于少数载流子吸收层的浓度的第一导电型半导体构成; 邻接半导体区域的阴极接触层; 和阴极电极。

公开(公告)号：US08648447B2

公开(公告)日：2014-02-11

申请号：US13409820

申请日：2012-03-01

申请人： Makoto Mizukami ,  Masamu Kamaga ,  Kazuto Takao

发明人： Makoto Mizukami ,  Masamu Kamaga ,  Kazuto Takao

IPC分类号： H01L29/868

CPC分类号： H01L29/868 ,  H01L29/1608

摘要： A semiconductor rectifier device using an SiC semiconductor at least includes: an anode electrode; an anode area that adjoins the anode electrode and is made of a second conductivity type semiconductor; a drift layer that adjoins the anode area and is made of a first conductivity type semiconductor having a low concentration; a minority carrier absorption layer that adjoins the drift layer and is made of a first conductivity type semiconductor having a higher concentration than that of the drift layer; a high-resistance semiconductor area that adjoins the minority carrier absorption layer, has less thickness than the drift layer and is made of a first conductivity type semiconductor having a concentration lower than that of the minority carrier absorption layer; a cathode contact layer that adjoins the semiconductor area; and a cathode electrode.

摘要翻译： 使用SiC半导体的半导体整流装置至少包括：阳极电极; 邻接阳极电极并由第二导电型半导体制成的阳极区域; 漂移层，其邻接阳极区域并由具有低浓度的第一导电型半导体制成; 与漂移层相邻并且由比漂移层的浓度高的第一导电型半导体制成的少数载流子吸收层; 与少数载流子吸收层相邻的高电阻半导体区域的厚度小于漂移层的厚度，并且由具有低于少数载流子吸收层的浓度的第一导电型半导体构成; 邻接半导体区域的阴极接触层; 和阴极电极。

公开(公告)号：US08638134B2

公开(公告)日：2014-01-28

申请号：US13222510

申请日：2011-08-31

申请人： Kazuto Takao ,  Masamu Kamaga

发明人： Kazuto Takao ,  Masamu Kamaga

IPC分类号： H03K3/00

CPC分类号： H03K17/162 ,  H01L2924/0002 ,  H02M7/538 ,  H03K2217/0036 ,  H01L2924/00

摘要： A gate drive circuit capable of operating at high speed and with low loss without erroneously operating the switching element is provided with a small number of components and a simple and easy circuit configuration. A primary side of a transformer is connected to an output terminal of a low-side gate drive circuit, and a secondary side of the transformer is connected to a gate input side of a high-side switching element. As a positive gate drive voltage is output from the low-side drive circuit, a negative voltage is applied between the gate and source of a high-side switching element, and a gate voltage is suppressed to be equal to or lower than a threshold value. Therefore, the high-side switching element maintains a turn-off state when the low-side switching element is turned on.

摘要翻译： 能够以高速和低损耗运行而不会错误地操作开关元件的栅极驱动电路具有少量的部件和简单且容易的电路配置。 变压器的初级侧连接到低侧栅极驱动电路的输出端，并且变压器的次级侧连接到高侧开关元件的栅极输入侧。 由于从低侧驱动电路输出正栅极驱动电压，在高侧开关元件的栅极和源极之间施加负电压，并且将栅极电压抑制在等于或低于阈值 。 因此，当低侧开关元件接通时，高侧开关元件保持断开状态。

公开(公告)号：US07599754B2

公开(公告)日：2009-10-06

申请号：US11757675

申请日：2007-06-04

申请人： Hiromichi Oohashi ,  Kazuto Takao ,  Yuusuke Hayashi

发明人： Hiromichi Oohashi ,  Kazuto Takao ,  Yuusuke Hayashi

IPC分类号： G06F19/00 ,  H02M1/00

CPC分类号： G06F17/5036 ,  G06F17/5063

摘要： After specifications of a power converter are determined, circuit parameter values, a semiconductor device to be used, and an equivalent circuit of the semiconductor device are determined, and parameter values of the equivalent circuit are extracted. Semiconductor device loss is calculated from semiconductor device equivalent circuit parameter data, circuit parasitic parameter data, and circuit basic parameters. Determination as to whether or not the circuit loss optimal value has been achieved is made in consideration of power conversion circuit component parameter data. When the optimal value has not been achieved, the circuit parasitic parameter values are set again so as to create the circuit parasitic parameter data. When the optimal value has been achieved, the semiconductor device loss and the circuit parasitic parameter values at that time are output as design data, and the power converter is designed by use of the optimized semiconductor device loss and circuit parasitic parameter values.

摘要翻译： 在确定功率转换器的规格之后，确定电路参数值，要使用的半导体器件和半导体器件的等效电路，并且提取等效电路的参数值。 半导体器件损耗由半导体器件等效电路参数数据，电路寄生参数数据和电路基本参数计算。 考虑到功率转换电路组件参数数据，确定是否已经实现了电路损耗最优值。 当没有达到最佳值时，再次设置电路寄生参数值，以产生电路寄生参数数据。 当达到最佳值时，将半导体器件损耗和电路寄生参数值作为设计数据输出，并通过优化的半导体器件损耗和电路寄生参数值设计功率转换器。

公开(公告)号：US20070282473A1

公开(公告)日：2007-12-06

申请号：US11757675

申请日：2007-06-04

申请人： Hiromichi OOHASHI ,  Kazuto Takao ,  Yuusuke Hayashi

发明人： Hiromichi OOHASHI ,  Kazuto Takao ,  Yuusuke Hayashi

IPC分类号： G06F19/00

CPC分类号： G06F17/5036 ,  G06F17/5063

摘要： After specifications of a power converter are determined, circuit parameter values, a semiconductor device to be used, and an equivalent circuit of the semiconductor device are determined, and parameter values of the equivalent circuit are extracted. Semiconductor device loss is calculated from semiconductor device equivalent circuit parameter data, circuit parasitic parameter data, and circuit basic parameters. Determination as to whether or not the circuit loss optimal value has been achieved is made in consideration of power conversion circuit component parameter data. When the optimal value has not been achieved, the circuit parasitic parameter values are set again so as to create the circuit parasitic parameter data. When the optimal value has been achieved, the semiconductor device loss and the circuit parasitic parameter values at that time are output as design data, and the power converter is designed by use of the optimized semiconductor device loss and circuit parasitic parameter values.

摘要翻译： 在确定功率转换器的规格之后，确定电路参数值，要使用的半导体器件和半导体器件的等效电路，并且提取等效电路的参数值。 半导体器件损耗由半导体器件等效电路参数数据，电路寄生参数数据和电路基本参数计算。 考虑到功率转换电路组件参数数据，确定是否已经实现了电路损耗最优值。 当没有达到最佳值时，再次设置电路寄生参数值，以产生电路寄生参数数据。 当达到最佳值时，将半导体器件损耗和电路寄生参数值作为设计数据输出，并通过优化的半导体器件损耗和电路寄生参数值设计功率转换器。

公开(公告)号：US08901622B2

公开(公告)日：2014-12-02

申请号：US13038803

申请日：2011-03-02

申请人： Chiharu Ota ,  Hiroshi Kono ,  Kazuto Takao ,  Takashi Shinohe

发明人： Chiharu Ota ,  Hiroshi Kono ,  Kazuto Takao ,  Takashi Shinohe

IPC分类号： H01L29/80 ,  H01L31/112 ,  H01L23/62 ,  H01L29/06 ,  H01L29/16 ,  H01L29/868 ,  H01L29/872

CPC分类号： H01L29/0615 ,  H01L29/0619 ,  H01L29/1608 ,  H01L29/868 ,  H01L29/872

摘要： A semiconductor device according to an embodiment includes a semiconductor substrate of a first conductivity type, a first semiconductor layer of the first conductivity type, a first semiconductor region of a second conductivity type, a second semiconductor region of the second conductivity type, a first electrode and a second electrode. The first semiconductor region is formed on at least a part of the first semiconductor layer formed on the semiconductor substrate. The second semiconductor region is formed on another part of the first semiconductor layer to reach an inside of the first semiconductor layer and having an impurity concentration higher than that of the first semiconductor region. The first electrode is formed on the second semiconductor region and a third semiconductor regions formed in a part of the first semiconductor region. The second electrode is formed to be in contact with a rear surface of the semiconductor substrate.

摘要翻译： 根据实施例的半导体器件包括第一导电类型的半导体衬底，第一导电类型的第一半导体层，第二导电类型的第一半导体区域，第二导电类型的第二半导体区域，第一电极 和第二电极。 第一半导体区域形成在形成在半导体衬底上的第一半导体层的至少一部分上。 第二半导体区域形成在第一半导体层的另一部分上，以到达第一半导体层的内部，并且其杂质浓度高于第一半导体区域的杂质浓度。 第一电极形成在第二半导体区域上，第三半导体区域形成在第一半导体区域的一部分中。 第二电极形成为与半导体衬底的后表面接触。

公开(公告)号：US08422255B2

公开(公告)日：2013-04-16

申请号：US12876762

申请日：2010-09-07

申请人： Kazuto Takao

发明人： Kazuto Takao

IPC分类号： H02M5/458 ,  H02M7/95

CPC分类号： H02M1/34 ,  H02M2001/344

摘要： An oscillation control part composed of a control switching element and a damping resistance connected in parallel is arranged between an input power supply and a main switching element of a power conversion circuit, and the control switching element and the main switching element have a relationship such as Ron(S2)

摘要翻译： 在输入电源和功率转换电路的主开关元件之间配置由控制开关元件和并联连接的阻尼电阻构成的振荡控制部，控制开关元件和主开关元件具有 Ron（S2）

公开(公告)号：US20120056198A1

公开(公告)日：2012-03-08

申请号：US13038803

申请日：2011-03-02

申请人： Chiharu OTA ,  Hiroshi Kono ,  Kazuto Takao ,  Takashi Shinohe

发明人： Chiharu OTA ,  Hiroshi Kono ,  Kazuto Takao ,  Takashi Shinohe

IPC分类号： H01L29/872 ,  H01L21/329

CPC分类号： H01L29/0615 ,  H01L29/0619 ,  H01L29/1608 ,  H01L29/868 ,  H01L29/872

摘要： A semiconductor device according to an embodiment includes a semiconductor substrate of a first conductivity type, a first semiconductor layer of the first conductivity type, a first semiconductor region of a second conductivity type, a second semiconductor region of the second conductivity type, a first electrode and a second electrode. The first semiconductor region is formed on at least a part of the first semiconductor layer formed on the semiconductor substrate. The second semiconductor region is formed on another part of the first semiconductor layer to reach an inside of the first semiconductor layer and having an impurity concentration higher than that of the first semiconductor region. The first electrode is formed on the second semiconductor region and a third semiconductor regions formed in a part of the first semiconductor region. The second electrode is formed to be in contact with a rear surface of the semiconductor substrate.

摘要翻译： 根据实施例的半导体器件包括第一导电类型的半导体衬底，第一导电类型的第一半导体层，第二导电类型的第一半导体区域，第二导电类型的第二半导体区域，第一电极 和第二电极。 第一半导体区域形成在形成在半导体衬底上的第一半导体层的至少一部分上。 第二半导体区域形成在第一半导体层的另一部分上，以到达第一半导体层的内部，并且其杂质浓度高于第一半导体区域的杂质浓度。 第一电极形成在第二半导体区域上，第三半导体区域形成在第一半导体区域的一部分中。 第二电极形成为与半导体衬底的后表面接触。