METHOD AND APPARATUS FOR GENERATING A PLURALITY OF STENCIL REFERENCE VALUES FOR A CORRESPONDING PLURALITY OF PIXELS OR PIXEL SAMPLES
    1.
    发明申请
    METHOD AND APPARATUS FOR GENERATING A PLURALITY OF STENCIL REFERENCE VALUES FOR A CORRESPONDING PLURALITY OF PIXELS OR PIXEL SAMPLES 有权
    用于产生多个像素或像素样本的相关多项式的参考值的方法和装置

    公开(公告)号:US20080225049A1

    公开(公告)日:2008-09-18

    申请号:US11686524

    申请日:2007-03-15

    IPC分类号: G06T15/40

    CPC分类号: G06T15/40 G06T2200/28

    摘要: Based on a driver programmable stencil reference value command, stencil reference value logic produces a plurality of stencil reference values for a corresponding plurality of pixels or pixel samples. At least one of the plurality of stencil reference values has a different value than at least one other of the plurality of stencil reference values. The driver programmable stencil reference value command may include a reference to instruction data or instruction data itself such that the graphics processing logic produces the plurality of stencil reference values based on the instruction data. Stencil logic performs a stencil test on the produced plurality of stencil reference values with respect to or without reference to a previously produced plurality of stencil values. Stencil logic performs stencil operations based on the result of the stencil test.

    摘要翻译: 基于驱动器可编程模板参考值命令,模板参考值逻辑产生用于对应的多个像素或像素样本的多个模板参考值。 多个模板参考值中的至少一个具有与多个模板参考值中的至少另一个不同的值。 驱动器可编程模板参考值命令可以包括对指令数据或指令数据本身的引用,使得图形处理逻辑基于指令数据产生多个模板参考值。 模板逻辑相对于或不参考先前产生的多个模板值,对所生成的多个模板参考值执行模板测试。 模板逻辑基于模板测试的结果执行模板操作。

    Method and apparatus for generating a plurality of stencil reference values for a corresponding plurality of pixels or pixel samples
    2.
    发明授权
    Method and apparatus for generating a plurality of stencil reference values for a corresponding plurality of pixels or pixel samples 有权
    用于生成对应的多个像素或像素样本的多个模板参考值的方法和装置

    公开(公告)号:US08243096B2

    公开(公告)日:2012-08-14

    申请号:US11686524

    申请日:2007-03-15

    IPC分类号: G09G5/00

    CPC分类号: G06T15/40 G06T2200/28

    摘要: Based on a driver programmable stencil reference value command, stencil reference value logic produces a plurality of stencil reference values for a corresponding plurality of pixels or pixel samples. At least one of the plurality of stencil reference values has a different value than at least one other of the plurality of stencil reference values. The driver programmable stencil reference value command may include a reference to instruction data or instruction data itself such that the graphics processing logic produces the plurality of stencil reference values based on the instruction data. Stencil logic performs a stencil test on the produced plurality of stencil reference values with respect to or without reference to a previously produced plurality of stencil values. Stencil logic performs stencil operations based on the result of the stencil test.

    摘要翻译: 基于驱动器可编程模板参考值命令,模板参考值逻辑产生用于对应的多个像素或像素样本的多个模板参考值。 多个模板参考值中的至少一个具有与多个模板参考值中的至少另一个不同的值。 驱动器可编程模板参考值命令可以包括对指令数据或指令数据本身的引用,使得图形处理逻辑基于指令数据产生多个模板参考值。 模板逻辑相对于或不参考先前产生的多个模板值,对所生成的多个模板参考值执行模板测试。 模板逻辑基于模板测试的结果执行模板操作。

    Cache Management for Memory Operations
    3.
    发明申请
    Cache Management for Memory Operations 有权
    内存操作缓存管理

    公开(公告)号:US20130262775A1

    公开(公告)日:2013-10-03

    申请号:US13436767

    申请日:2012-03-30

    IPC分类号: G06F12/08

    摘要: Embodiments of the present invention provides for the execution of threads and/or workitems on multiple processors of a heterogeneous computing system in a manner that they can share data correctly and efficiently. Disclosed method, system, and article of manufacture embodiments include, responsive to an instruction from a sequence of instructions of a work-item, determining an ordering of visibility to other work-items of one or more other data items in relation to a particular data item, and performing at least one cache operation upon at least one of the particular data item or the other data items present in any one or more cache memories in accordance with the determined ordering. The semantics of the instruction includes a memory operation upon the particular data item.

    摘要翻译: 本发明的实施例提供在异构计算系统的多个处理器上执行线程和/或工作项,以使得它们可以正确且有效地共享数据。 公开的方法,系统和制品实施例包括响应于来自工作项目的指令序列的指令,确定与特定数据相关的一个或多个其他数据项的其他工作项的可见性的排序 并且根据所确定的顺序对存在于任何一个或多个高速缓存存储器中的特定数据项或其他数据项中的至少一个执行至少一个高速缓存操作。 指令的语义包括对特定数据项的存储器操作。

    System and method for performing depth testing at top and bottom of graphics pipeline
    4.
    发明申请
    System and method for performing depth testing at top and bottom of graphics pipeline 有权
    在图形管线顶部和底部进行深度测试的系统和方法

    公开(公告)号:US20070291030A1

    公开(公告)日:2007-12-20

    申请号:US11454267

    申请日:2006-06-16

    IPC分类号: G06T15/40

    CPC分类号: G06T15/405

    摘要: Embodiments of a system and method including graphics processing of a pixel sample are described. According to an embodiment, a first depth test processes a value, such as a z/stencil value, of a pixel sample and determines whether the value of the pixel sample satisfies the first depth test. If the value of the pixel sample satisfies the first depth test, the value of the pixel sample is not immediately written to storage, such as a Z-buffer. That is, if the value of the pixel sample satisfies the first depth test, the depth processing logic prevents or delays a write operation for the value of the pixel sample to storage at that time. A second depth test is performed on the value of the pixel sample if the value of the pixel sample satisfied the first depth test. If the value of the pixel sample satisfies the second depth test, the value of the pixel sample is then written to storage.

    摘要翻译: 描述包括像素样本的图形处理的系统和方法的实施例。 根据实施例,第一深度测试处理像素样本的值,例如z /模板值,并且确定像素样本的值是否满足第一深度测试。 如果像素样本的值满足第一深度测试,则像素样本的值不会立即写入诸如Z缓冲器的存储。 也就是说,如果像素样本的值满足第一深度测试,则深度处理逻辑防止或延迟对像素样本的值进行存储的写入操作。 如果像素样本的值满足第一深度测试,则对像素样本的值执行第二深度测试。 如果像素样本的值满足第二深度测试,则将像素样本的值写入存储。

    System and method for performing depth testing at top and bottom of graphics pipeline
    5.
    发明授权
    System and method for performing depth testing at top and bottom of graphics pipeline 有权
    在图形管线顶部和底部进行深度测试的系统和方法

    公开(公告)号:US09076265B2

    公开(公告)日:2015-07-07

    申请号:US11454267

    申请日:2006-06-16

    IPC分类号: G06T15/40

    CPC分类号: G06T15/405

    摘要: Embodiments of a system and method including graphics processing of a pixel sample are described. According to an embodiment, a first depth test processes a value, such as a z/stencil value, of a pixel sample and determines whether the value of the pixel sample satisfies the first depth test. If the value of the pixel sample satisfies the first depth test, the value of the pixel sample is not immediately written to storage, such as a Z-buffer. That is, if the value of the pixel sample satisfies the first depth test, the depth processing logic prevents or delays a write operation for the value of the pixel sample to storage at that time. A second depth test is performed on the value of the pixel sample if the value of the pixel sample satisfied the first depth test. If the value of the pixel sample satisfies the second depth test, the value of the pixel sample is then written to storage.

    摘要翻译: 描述包括像素样本的图形处理的系统和方法的实施例。 根据实施例,第一深度测试处理像素样本的值,例如z /模板值,并且确定像素样本的值是否满足第一深度测试。 如果像素样本的值满足第一深度测试,则像素样本的值不会立即写入诸如Z缓冲器的存储。 也就是说,如果像素样本的值满足第一深度测试,则深度处理逻辑防止或延迟对像素样本的值进行存储的写入操作。 如果像素样本的值满足第一深度测试,则对像素样本的值执行第二深度测试。 如果像素样本的值满足第二深度测试,则将像素样本的值写入存储。

    Shared memory space in a unified memory model
    6.
    发明授权
    Shared memory space in a unified memory model 有权
    共享内存空间在统一的内存模型中

    公开(公告)号:US09009419B2

    公开(公告)日:2015-04-14

    申请号:US13562985

    申请日:2012-07-31

    IPC分类号: G06F12/02 G06F12/06

    摘要: Methods and systems are provided for mapping a memory instruction to a shared memory address space in a computer arrangement having a CPU and an APD. A method includes receiving a memory instruction that refers to an address in the shared memory address space, mapping the memory instruction based on the address to a memory resource associated with either the CPU or the APD, and performing the memory instruction based on the mapping.

    摘要翻译: 提供了用于将存储器指令映射到具有CPU和APD的计算机装置中的共享存储器地址空间的方法和系统。 一种方法包括接收参考共享存储器地址空间中的地址的存储器指令,将基于地址的存储器指令映射到与CPU或APD相关联的存储器资源,以及基于映射执行存储器指令。

    Cache management for memory operations
    7.
    发明授权
    Cache management for memory operations 有权
    内存操作缓存管理

    公开(公告)号:US08935475B2

    公开(公告)日:2015-01-13

    申请号:US13436767

    申请日:2012-03-30

    IPC分类号: G06F12/02 G06F12/08 G06F12/12

    摘要: Embodiments of the present invention provides for the execution of threads and/or workitems on multiple processors of a heterogeneous computing system in a manner that they can share data correctly and efficiently. Disclosed method, system, and article of manufacture embodiments include, responsive to an instruction from a sequence of instructions of a work-item, determining an ordering of visibility to other work-items of one or more other data items in relation to a particular data item, and performing at least one cache operation upon at least one of the particular data item or the other data items present in any one or more cache memories in accordance with the determined ordering. The semantics of the instruction includes a memory operation upon the particular data item.

    摘要翻译: 本发明的实施例提供在异构计算系统的多个处理器上执行线程和/或工作项,以使得它们可以正确且有效地共享数据。 公开的方法,系统和制品实施例包括响应于来自工作项目的指令序列的指令,确定与特定数据相关的一个或多个其他数据项的其他工作项的可见性的排序 并且根据所确定的顺序对存在于任何一个或多个高速缓存存储器中的特定数据项或其他数据项中的至少一个执行至少一个高速缓存操作。 指令的语义包括对特定数据项的存储器操作。

    Internal combustion engine
    8.
    发明申请
    Internal combustion engine 有权
    内燃机

    公开(公告)号:US20050139185A1

    公开(公告)日:2005-06-30

    申请号:US11018179

    申请日:2004-12-21

    IPC分类号: F02F1/00 F02F7/00 F16M1/025

    CPC分类号: F16M1/025 F02F7/0053

    摘要: A cylinder block for an internal combustion engine which, in use, supports a rotary crankshaft 40, the block having pairs of opposed lock width surfaces 37 formed thereon for forming an interference fit with respective co-operating lock width surfaces 38 on the crankshaft bearing caps 34 which in use are secured to respective bearing cap support surfaces 36 also formed on the block 31. The lock width surfaces 37, 38 are spaced from the respective bearing cap support surfaces 36 so as to improve stress cracking resistance of the block 31.

    摘要翻译: 一种用于内燃机的气缸体,其在使用中支撑旋转曲轴40,所述块具有形成在其上的成对相对的锁定宽度表面37,用于与曲轴轴承盖上的相应配合的锁定宽度表面38形成过盈配合 34,其在使用中固定到也形成在块31上的相应的轴承盖支撑表面36.锁定宽度表面37,38与相应的轴承盖支撑表面36间隔开,以提高块31的抗应力开裂性。

    Skimmer door assembly
    9.
    发明申请
    Skimmer door assembly 失效
    撇渣门总成

    公开(公告)号:US20060260035A1

    公开(公告)日:2006-11-23

    申请号:US11435516

    申请日:2006-05-17

    IPC分类号: E04H4/00

    CPC分类号: E04H4/1272

    摘要: A skimmer door assembly for use with a skimmer having an opening therein, having a face plate for matingly engaging the skimmer around the opening of the skimmer. The face plate has an opening therein which communicates with the opening of the skimmer. A raised rib portion extends around a periphery of the opening of the face plate. A cover has a first, planar wall which closes the opening of the face plate. The cover has a groove formed on the planar wall which engages the rib of the face plate for sealing the face plate to prevent water from entering the opening of the face plate.

    摘要翻译: 一种用于与其中具有开口的撇渣器一起使用的撇渣器门组件,具有用于将撇渣器与撇渣器的开口配合地接合的面板。 面板在其中具有与分离器的开口连通的开口。 隆起的肋部分围绕面板的开口的周边延伸。 盖具有封闭面板的开口的第一平面壁。 所述盖具有形成在所述平面壁上的槽,所述凹槽与所述面板的所述肋接合以密封所述面板,以防止水进入所述面板的开口。

    Miniature thermoacoustic cooler
    10.
    发明授权
    Miniature thermoacoustic cooler 失效
    微型热声冷却器

    公开(公告)号:US07017351B2

    公开(公告)日:2006-03-28

    申请号:US10717604

    申请日:2003-11-21

    IPC分类号: F25B9/00

    摘要: A MEMS based thermoacoustic cryo-cooler for thermal management of cryogenic electronic devices. The cryogenic cooling system can be integrated directly into a cryogenic electronic device. A vertical comb-drive provides an acoustic source through a driving plate to a resonant tube. By exciting a standing wave within the resonant tube, a temperature difference develops across a stack in the tube, thereby enabling heat exchange between heat exchangers. A tapered resonant tube improves the efficiency of the cooling system, compared with a simple cylinder configuration, leading to reduced harmonics and strong standing waves.

    摘要翻译: 一种基于MEMS的热声低温冷却器,用于低温电子设备的热管理。 低温冷却系统可以直接集成到低温电子设备中。 垂直梳齿驱动器通过驱动板向谐振管提供声源。 通过激发谐振管内的驻波,管中的堆叠产生温差,从而实现热交换器之间的热交换。 与简单的气缸配置相比,锥形谐振管提高了冷却系统的效率,从而降低了谐波和强驻波。