公开(公告)号：US09076265B2

公开(公告)日：2015-07-07

申请号：US11454267

申请日：2006-06-16

Applicant: Mark Fowler ,  Chris Brennan

Inventor： Mark Fowler ,  Chris Brennan

IPC: G06T15/40

CPC classification number: G06T15/405

Abstract: Embodiments of a system and method including graphics processing of a pixel sample are described. According to an embodiment, a first depth test processes a value, such as a z/stencil value, of a pixel sample and determines whether the value of the pixel sample satisfies the first depth test. If the value of the pixel sample satisfies the first depth test, the value of the pixel sample is not immediately written to storage, such as a Z-buffer. That is, if the value of the pixel sample satisfies the first depth test, the depth processing logic prevents or delays a write operation for the value of the pixel sample to storage at that time. A second depth test is performed on the value of the pixel sample if the value of the pixel sample satisfied the first depth test. If the value of the pixel sample satisfies the second depth test, the value of the pixel sample is then written to storage.

Abstract translation: 描述包括像素样本的图形处理的系统和方法的实施例。 根据实施例，第一深度测试处理像素样本的值，例如z /模板值，并且确定像素样本的值是否满足第一深度测试。 如果像素样本的值满足第一深度测试，则像素样本的值不会立即写入诸如Z缓冲器的存储。 也就是说，如果像素样本的值满足第一深度测试，则深度处理逻辑防止或延迟对像素样本的值进行存储的写入操作。 如果像素样本的值满足第一深度测试，则对像素样本的值执行第二深度测试。 如果像素样本的值满足第二深度测试，则将像素样本的值写入存储。

公开(公告)号：US09009419B2

公开(公告)日：2015-04-14

申请号：US13562985

申请日：2012-07-31

Applicant: Anthony Asaro ,  Kevin Normoyle ,  Mark D. Hummel ,  Mark Fowler

Inventor： Anthony Asaro ,  Kevin Normoyle ,  Mark D. Hummel ,  Mark Fowler

IPC: G06F12/02 ,  G06F12/06

CPC classification number: G06F12/063 ,  G06F12/0292 ,  G06F12/06

Abstract: Methods and systems are provided for mapping a memory instruction to a shared memory address space in a computer arrangement having a CPU and an APD. A method includes receiving a memory instruction that refers to an address in the shared memory address space, mapping the memory instruction based on the address to a memory resource associated with either the CPU or the APD, and performing the memory instruction based on the mapping.

Abstract translation: 提供了用于将存储器指令映射到具有CPU和APD的计算机装置中的共享存储器地址空间的方法和系统。 一种方法包括接收参考共享存储器地址空间中的地址的存储器指令，将基于地址的存储器指令映射到与CPU或APD相关联的存储器资源，以及基于映射执行存储器指令。

公开(公告)号：US08935475B2

公开(公告)日：2015-01-13

申请号：US13436767

申请日：2012-03-30

Applicant: Anthony Asaro ,  Kevin Normoyle ,  Mark Hummel ,  Norman Rubin ,  Mark Fowler

Inventor： Anthony Asaro ,  Kevin Normoyle ,  Mark Hummel ,  Norman Rubin ,  Mark Fowler

IPC: G06F12/02 ,  G06F12/08 ,  G06F12/12

CPC classification number: G06F12/0891 ,  G06F12/0815 ,  G06F12/0837 ,  G06F12/0877 ,  G06F12/123 ,  G06F12/126 ,  G06F12/128

Abstract: Embodiments of the present invention provides for the execution of threads and/or workitems on multiple processors of a heterogeneous computing system in a manner that they can share data correctly and efficiently. Disclosed method, system, and article of manufacture embodiments include, responsive to an instruction from a sequence of instructions of a work-item, determining an ordering of visibility to other work-items of one or more other data items in relation to a particular data item, and performing at least one cache operation upon at least one of the particular data item or the other data items present in any one or more cache memories in accordance with the determined ordering. The semantics of the instruction includes a memory operation upon the particular data item.

Abstract translation: 本发明的实施例提供在异构计算系统的多个处理器上执行线程和/或工作项，以使得它们可以正确且有效地共享数据。 公开的方法，系统和制品实施例包括响应于来自工作项目的指令序列的指令，确定与特定数据相关的一个或多个其他数据项的其他工作项的可见性的排序 并且根据所确定的顺序对存在于任何一个或多个高速缓存存储器中的特定数据项或其他数据项中的至少一个执行至少一个高速缓存操作。 指令的语义包括对特定数据项的存储器操作。

公开(公告)号：US20050139185A1

公开(公告)日：2005-06-30

申请号：US11018179

申请日：2004-12-21

Applicant: Darren Grennall ,  John Rowley ,  Paul Turner ,  Derek Banks ,  Mark Fowler ,  Mark Danby

Inventor： Darren Grennall ,  John Rowley ,  Paul Turner ,  Derek Banks ,  Mark Fowler ,  Mark Danby

IPC: F02F1/00 ,  F02F7/00 ,  F16M1/025

CPC classification number: F16M1/025 ,  F02F7/0053

Abstract: A cylinder block for an internal combustion engine which, in use, supports a rotary crankshaft 40, the block having pairs of opposed lock width surfaces 37 formed thereon for forming an interference fit with respective co-operating lock width surfaces 38 on the crankshaft bearing caps 34 which in use are secured to respective bearing cap support surfaces 36 also formed on the block 31. The lock width surfaces 37, 38 are spaced from the respective bearing cap support surfaces 36 so as to improve stress cracking resistance of the block 31.

Abstract translation: 一种用于内燃机的气缸体，其在使用中支撑旋转曲轴40，所述块具有形成在其上的成对相对的锁定宽度表面37，用于与曲轴轴承盖上的相应配合的锁定宽度表面38形成过盈配合 34，其在使用中固定到也形成在块31上的相应的轴承盖支撑表面36.锁定宽度表面37,38与相应的轴承盖支撑表面36间隔开，以提高块31的抗应力开裂性。

公开(公告)号：US08963931B2

公开(公告)日：2015-02-24

申请号：US12879582

申请日：2010-09-10

Applicant: Mark Fowler

Inventor： Mark Fowler

IPC: G06F15/16 ,  G06F15/80 ,  G06F9/50 ,  G06F12/02

CPC classification number: G06F9/5016 ,  G06F12/023 ,  G06F12/0284

Abstract: A method and system for processing a graphics frame in a multi-processor computing environment are described. Embodiments of the present invention enable the reduction of the memory footprint required for processing a graphics frame in a multi-processor system. In one embodiment a method of processing a graphics frame using a plurality of processors is presented. The method includes determining a respective assignment of tiles of the graphics frame to each processor of the plurality of processors; allocating a memory area in a local memory of each processor, where the size of the allocated memory area substantially corresponds to the aggregate size of tiles assigned to the respective processor; and storing the tiles of the respective assignment of tiles in the memory area of each respective processor.

Abstract translation: 描述了用于处理多处理器计算环境中的图形帧的方法和系统。 本发明的实施例能够减少在多处理器系统中处理图形帧所需的存储器占用空间。 在一个实施例中，呈现了使用多个处理器来处理图形帧的方法。 该方法包括确定图形帧的瓦片对多个处理器中的每个处理器的相应分配; 在每个处理器的本地存储器中分配存储器区域，其中分配的存储器区域的大小基本上对应于分配给相应处理器的瓦片的聚合大小; 以及将各个瓦片的分配的瓦片存储在每个相应的处理器的存储区域中。

公开(公告)号：US08243096B2

公开(公告)日：2012-08-14

申请号：US11686524

申请日：2007-03-15

Applicant: Mark Fowler ,  Christopher J. Brennan

Inventor： Mark Fowler ,  Christopher J. Brennan

IPC: G09G5/00

CPC classification number: G06T15/40 ,  G06T2200/28

Abstract: Based on a driver programmable stencil reference value command, stencil reference value logic produces a plurality of stencil reference values for a corresponding plurality of pixels or pixel samples. At least one of the plurality of stencil reference values has a different value than at least one other of the plurality of stencil reference values. The driver programmable stencil reference value command may include a reference to instruction data or instruction data itself such that the graphics processing logic produces the plurality of stencil reference values based on the instruction data. Stencil logic performs a stencil test on the produced plurality of stencil reference values with respect to or without reference to a previously produced plurality of stencil values. Stencil logic performs stencil operations based on the result of the stencil test.

Abstract translation: 基于驱动器可编程模板参考值命令，模板参考值逻辑产生用于对应的多个像素或像素样本的多个模板参考值。 多个模板参考值中的至少一个具有与多个模板参考值中的至少另一个不同的值。 驱动器可编程模板参考值命令可以包括对指令数据或指令数据本身的引用，使得图形处理逻辑基于指令数据产生多个模板参考值。 模板逻辑相对于或不参考先前产生的多个模板值，对所生成的多个模板参考值执行模板测试。 模板逻辑基于模板测试的结果执行模板操作。

公开(公告)号：US07152568B2

公开(公告)日：2006-12-26

申请号：US11018179

申请日：2004-12-21

Applicant: Darren J. Grennall ,  John Rowley ,  Paul N. Turner ,  Derek Banks ,  Mark Fowler ,  Mark Danby

Inventor： Darren J. Grennall ,  John Rowley ,  Paul N. Turner ,  Derek Banks ,  Mark Fowler ,  Mark Danby

IPC: F16C9/02 ,  F02F7/00

CPC classification number: F16M1/025 ,  F02F7/0053

Abstract: A cylinder block for an internal combustion engine which, in use, supports a rotary crankshaft 40, the block having pairs of opposed lock width surfaces 37 formed thereon for forming an interference fit with respective co-operating lock width surfaces 38 on the crankshaft bearing caps 34 which in use are secured to respective bearing cap support surfaces 36 also formed on the block 31. The lock width surfaces 37, 38 are spaced from the respective bearing cap support surfaces 36 so as to improve stress cracking resistance of the block 31.

Abstract translation: 一种用于内燃机的气缸体，其在使用中支撑旋转曲轴40，所述块具有形成在其上的成对相对的锁定宽度表面37，用于与曲轴轴承盖上的相应配合的锁定宽度表面38形成过盈配合 34，其在使用中固定到也形成在块31上的相应的轴承盖支撑表面36.锁定宽度表面37,38与相应的轴承盖支撑表面36间隔开，以提高块31的抗应力开裂性。

公开(公告)号：US20060273652A1

公开(公告)日：2006-12-07

申请号：US11430695

申请日：2006-05-09

Applicant: Larry Winch ,  Mark Fowler

Inventor： Larry Winch ,  Mark Fowler

IPC: B60B1/00

CPC classification number: F16F15/328

Abstract: A balance weight has a body having a cavity formed therein, a solid weight member substantially filling the cavity of the body; and an adhesive formed on a side of the body for securing the balance weight to an associated object to be balanced. A balance weight can be secured to a tire and weight assembly and has a solid body formed entirely of plastic material, wherein the body is secured to the tire and wheel assembly via an adhesive layer on one side of the body. The body can have an internal cavity formed within the body and a weight member made of metal which substantially fills the internal cavity.

Abstract translation: 平衡配重具有其中形成有空腔的主体，固体配重构件基本上填充主体的空腔; 以及形成在主体侧面上的粘合剂，用于将平衡重固定到相关联的物体上以使其平衡。 平衡重可以固定到轮胎和重量组件上，并且具有完全由塑料材料形成的固体，其中主体通过主体一侧上的粘合剂层固定到轮胎和轮组件。 主体可以具有形成在主体内的内部空腔和由金属制成的重量构件，其基本上填充内部空腔。

公开(公告)号：US06700583B2

公开(公告)日：2004-03-02

申请号：US09853582

申请日：2001-05-14

Applicant: Mark Fowler ,  Michael T. Wright

Inventor： Mark Fowler ,  Michael T. Wright

IPC: G09G539

CPC classification number: G06T15/005

Abstract: A configurable buffer has two storage areas. Depending upon a state of a buffer control signal, the two storage areas are configured to buffer a single stream of data together or to buffer two streams of data separately. In an exemplary video graphics processing application, one stream of data includes pass-through values of fragments being rendered (e.g. color, location, and/or depth values) and the other stream of data includes corresponding displaced (or otherwise perturbed) texture coordinate pairs. Such a buffer may be used to reduce the amount of buffer storage needed to support both single-pass and multipass operations in a pixel pipeline.

Abstract translation: 可配置的缓冲区有两个存储区域。 根据缓冲器控制信号的状态，两个存储区域被配置为将单个数据流缓冲在一起或者分别缓冲两个数据流。 在示例性视频图形处理应用中，一条数据流包括被渲染的片段的传递值（例如，颜色，位置和/或深度值），另一数据流包括相应的移位（或以其他方式扰动）的纹理坐标对 。 这样的缓冲器可以用于减少在像素管线中支持单程和多次操作所需的缓冲存储器的量。

公开(公告)号：US20120013629A1

公开(公告)日：2012-01-19

申请号：US13186266

申请日：2011-07-19

Applicant: Mark FOWLER

Inventor： Mark FOWLER

IPC: G09G5/39

CPC classification number: G06T9/00

Abstract: Embodiments of the present invention enable the reduction of the memory bandwidth required for graphics rendering. According to an embodiment, a method to render a pixel from a compressed anti-aliased image includes: accessing metadata for the pixel, where the metadata includes entries for respective samples generated by multisampling the pixel; and retrieving a subset of said samples based upon the metadata, wherein the subset is stored in the compressed anti-aliased image stored in a memory.

Abstract translation: 本发明的实施例能够减少图形渲染所需的存储器带宽。 根据实施例，从压缩抗锯齿图像渲染像素的方法包括：访问像素的元数据，其中所述元数据包括通过对所述像素进行多次取样产生的相应样本的条目; 以及基于所述元数据检索所述样本的子集，其中所述子集存储在存储在存储器中的压缩抗锯齿图像中。