公开(公告)号：US10955460B2

公开(公告)日：2021-03-23

申请号：US13635683

申请日：2011-03-16

申请人： Mark Kassab ,  Grzegorz Mrugalski ,  Nilanjan Mukherjee ,  Janusz Rajski ,  Jakub Janicki ,  Jerzy Tyszer

发明人： Mark Kassab ,  Grzegorz Mrugalski ,  Nilanjan Mukherjee ,  Janusz Rajski ,  Jakub Janicki ,  Jerzy Tyszer

IPC分类号： G01R31/28 ,  G01R31/319 ,  G01R31/3185 ,  G01R31/3183

摘要： Disclosed are representative embodiments of methods, apparatus, and systems for test scheduling and test access in a test compression environment. Clusters of test patterns for testing a plurality of cores in a circuit are formed based on test information that includes compressed test data, corresponding tester channel requirements and correlated cores. The formation of test pattern clusters is followed by tester channel allocation. A best-fit scheme or a balanced-fit scheme may be employed to generate channel allocation information. A test access circuit for dynamic channel allocation can be designed based on the channel allocation information.

公开(公告)号：US20130290795A1

公开(公告)日：2013-10-31

申请号：US13980287

申请日：2012-01-17

申请人： Janusz Rajski ,  Mark A. Kassab ,  Grzegorz Mrugalski ,  Nilanjan Mukherjee ,  Jakub Janicki ,  Jerzy Tyszer ,  Avijit Dutta

发明人： Janusz Rajski ,  Mark A. Kassab ,  Grzegorz Mrugalski ,  Nilanjan Mukherjee ,  Jakub Janicki ,  Jerzy Tyszer ,  Avijit Dutta

IPC分类号： H04L12/26

CPC分类号： H04L43/50 ,  G01R31/318335 ,  G06F11/263

摘要： Disclosed are representative embodiments of methods, apparatus, and systems for test scheduling for testing a plurality of cores in a system on circuit. Test data are encoded to derive compressed test patterns that require small numbers of core input channels. Core input/output channel requirement information for each of the compressed test patterns is determined accordingly. The compressed patterns are grouped into test pattern classes. The formation of the test pattern classes is followed by allocation circuit input and output channels and test application time slots that may comprise merging complementary test pattern classes into clusters that can work with a particular test access mechanism. The test access mechanism may be designed independent of the test data.

摘要翻译： 公开了用于在电路系统中测试多个核的测试调度的方法，装置和系统的代表性实施例。 编码测试数据以导出需要少量核心输入通道的压缩测试模式。 相应地确定每个压缩测试图案的核心输入/输出通道要求信息。 压缩的模式被分组成测试模式类。 测试模式类的形成之后是分配电路输入和输出通道以及测试应用时隙，其可以包括将互补测试模式类合并成可以与特定测试访问机制一起工作的集群。 可以独立于测试数据设计测试访问机制。

公开(公告)号：US09088522B2

公开(公告)日：2015-07-21

申请号：US13980287

申请日：2012-01-17

申请人： Janusz Rajski ,  Mark A Kassab ,  Grzegorz Mrugalski ,  Nilanjan Mukherjee ,  Jakub Janicki ,  Jerzy Tyszer ,  Avijit Dutta

发明人： Janusz Rajski ,  Mark A Kassab ,  Grzegorz Mrugalski ,  Nilanjan Mukherjee ,  Jakub Janicki ,  Jerzy Tyszer ,  Avijit Dutta

IPC分类号： H04L12/26 ,  G01R31/3183 ,  G06F11/263

CPC分类号： H04L43/50 ,  G01R31/318335 ,  G06F11/263

摘要： Disclosed are representative embodiments of methods, apparatus, and systems for test scheduling for testing a plurality of cores in a system on circuit. Test data are encoded to derive compressed test patterns that require small numbers of core input channels. Core input/output channel requirement information for each of the compressed test patterns is determined accordingly. The compressed patterns are grouped into test pattern classes. The formation of the test pattern classes is followed by allocation circuit input and output channels and test application time slots that may comprise merging complementary test pattern classes into clusters that can work with a particular test access mechanism. The test access mechanism may be designed independent of the test data.

摘要翻译： 公开了用于在电路系统中测试多个核的测试调度的方法，装置和系统的代表性实施例。 编码测试数据以导出需要少量核心输入通道的压缩测试模式。 相应地确定每个压缩测试图案的核心输入/输出通道要求信息。 压缩的模式被分组成测试模式类。 测试模式类的形成之后是分配电路输入和输出通道以及测试应用时隙，其可以包括将互补测试模式类合并成可以与特定测试访问机制一起工作的集群。 可以独立于测试数据设计测试访问机制。

公开(公告)号：US20150285854A1

公开(公告)日：2015-10-08

申请号：US13635683

申请日：2011-03-16

申请人： Mark A. Kassab ,  Grzegorz Mrugalski ,  Nilanjan Mukherjee ,  Janusz Rajski ,  Jakub Janicki ,  Tyszer Jerzy

发明人： Mark A. Kassab ,  Grzegorz Mrugalski ,  Nilanjan Mukherjee ,  Janusz Rajski ,  Jakub Janicki ,  Tyszer Jerzy

IPC分类号： G01R31/28

CPC分类号： G01R31/2834 ,  G01R31/2851 ,  G01R31/318335 ,  G01R31/318547 ,  G01R31/31921

摘要： Disclosed are representative embodiments of methods, apparatus, and systems for test scheduling and test access in a test compression environment. Clusters of test patterns for testing a plurality of cores in a circuit are formed based on test information that includes compressed test data, corresponding tester channel requirements and correlated cores. The formation of test pattern clusters is followed by tester channel allocation. A best-fit scheme or a balanced-fit scheme may be employed to generate channel allocation information. A test access circuit for dynamic channel allocation can be designed based on the channel allocation information.

摘要翻译： 公开了测试压缩环境中用于测试调度和测试访问的方法，装置和系统的代表性实施例。 基于包括压缩测试数据，对应的测试仪通道要求和相关核心的测试信息形成用于测试电路中的多个核心的测试模式的集群。 测试模式集群的形成之后是测试者信道分配。 可以采用最佳拟合方案或平衡拟合方案来产生信道分配信息。 可以基于信道分配信息来设计用于动态信道分配的测试接入电路。