Selective removal of a silicon oxide layer
    1.
    发明授权
    Selective removal of a silicon oxide layer 有权
    选择性去除氧化硅层

    公开(公告)号:US08759174B2

    公开(公告)日:2014-06-24

    申请号:US12559810

    申请日:2009-09-15

    Abstract: A method of fabricating a device, including the steps of forming a first silicon oxide layer within a first region of the device and a second silicon oxide layer within a second region of the device, implanting doping ions of a first type into the first region, implanting doping ions of a second type into the second region, and etching the first and second regions for a determined duration such that the first silicon oxide layer is removed and at least a part of the second silicon oxide layer remains.

    Abstract translation: 一种制造器件的方法,包括以下步骤:在器件的第一区域内形成第一氧化硅层,在器件的第二区域内形成第二氧化硅层,将第一类型的掺杂离子注入第一区域; 将第二类型的掺杂离子注入到所述第二区域中,以及蚀刻所述第一和第二区域一段确定的持续时间,以使得所述第一氧化硅层被去除并且所述第二氧化硅层的至少一部分保留。

    SELECTIVE REMOVAL OF A SILICON OXIDE LAYER
    2.
    发明申请
    SELECTIVE REMOVAL OF A SILICON OXIDE LAYER 有权
    选择性去除氧化硅层

    公开(公告)号:US20100041189A1

    公开(公告)日:2010-02-18

    申请号:US12559810

    申请日:2009-09-15

    Abstract: A method of fabricating a device, including the steps of forming a first silicon oxide layer within a first region of the device and a second silicon oxide layer within a second region of the device, implanting doping ions of a first type into the first region, implanting doping ions of a second type into the second region, and etching the first and second regions for a determined duration such that the first silicon oxide layer is removed and at least a part of the second silicon oxide layer remains.

    Abstract translation: 一种制造器件的方法,包括以下步骤:在器件的第一区域内形成第一氧化硅层,在器件的第二区域内形成第二氧化硅层,将第一类型的掺杂离子注入第一区域; 将第二类型的掺杂离子注入到所述第二区域中,以及蚀刻所述第一和第二区域一段确定的持续时间,以使得所述第一氧化硅层被去除并且所述第二氧化硅层的至少一部分保留。

    Effecting selectivity of silicon or silicon-germanium deposition on a silicon or silicon-germanium substrate by doping
    3.
    发明授权
    Effecting selectivity of silicon or silicon-germanium deposition on a silicon or silicon-germanium substrate by doping 有权
    通过掺杂对硅或硅 - 锗衬底的硅或硅 - 锗沉积的选择性影响

    公开(公告)号:US08080452B2

    公开(公告)日:2011-12-20

    申请号:US12375895

    申请日:2007-07-31

    Abstract: The invention relates to a method for selective deposition of Si or SiGe on a Si or SiGe surface. The method exploits differences in physico-chemical surface behavior according to a difference in doping of first and second surface regions. By providing at least one first surface region with a Boron doping of a suitable concentration range and exposing the substrate surface to a cleaning and passivating ambient atmosphere in a prebake step at a temperature lower or equal than 800° C., a subsequent deposition step of Si or SiGe will not lead to a layer deposition in the first surface region. This effect is used for selective deposition of Si or SiGe in the second surface region, which is not doped with Boron in the suitable concentration range, or doped with another dopant, or not doped. The method thus saves a usual photolithography sequence required for selective deposition of Si or SiGe in the second surface region according to the prior art.

    Abstract translation: 本发明涉及用于在Si或SiGe表面上选择性沉积Si或SiGe的方法。 该方法根据第一和第二表面区域的掺杂差异,利用物理化学表面行为的差异。 通过提供具有适当浓度范围的硼掺杂的至少一个第一表面区域,并且在低于或等于800℃的温度下在预烘烤步骤中将衬底表面暴露于清洁和钝化环境气氛中,随后的沉积步骤 Si或SiGe不会导致第一表面区域中的层沉积。 该效应用于在不掺杂硼的合适浓度范围内或掺杂有另一掺杂剂的第二表面区域中选择性沉积Si或SiGe,或不掺杂。 因此,该方法节省了根据现有技术在第二表面区域中选择性沉积Si或SiGe所需的常规光刻序列。

    MOS Transistor With Better Short Channel Effect Control and Corresponding Manufacturing Method
    4.
    发明申请
    MOS Transistor With Better Short Channel Effect Control and Corresponding Manufacturing Method 审中-公开
    具有更好的短沟道效应控制的MOS晶体管和相应的制造方法

    公开(公告)号:US20100283107A1

    公开(公告)日:2010-11-11

    申请号:US12086561

    申请日:2006-12-07

    Abstract: The integrated circuit comprises at least one MOS transistor (T) including a gate (GR) having a bottom part in contact with the gate oxide. Said bottom part has an inhomogeneous work function (WFB, WFA) along the length of the gate between the source and drain regions, the value of the work function being greater at the extremities of the gate than in the centre of the gate. The gate comprises a first material (A) in the centre and a second material (B) in the remaining part. Such configuration is obtained for example by silicidation.

    Abstract translation: 集成电路包括至少一个MOS晶体管(T),其包括具有与栅极氧化物接触的底部的栅极(GR)。 所述底部部分沿源极和漏极区域之间的栅极长度具有不均匀的功函数(WFB,WFA),在栅极的末端,功函数值大于栅极中心的值。 该门包括中心的第一材料(A)和剩余部分中的第二材料(B)。 这种配置例如通过硅化获得。

    Effecting selectivity of silicon or silicon-germanium deposition on a silicon or silicon-germanium substrate by doping
    5.
    发明授权
    Effecting selectivity of silicon or silicon-germanium deposition on a silicon or silicon-germanium substrate by doping 有权
    通过掺杂对硅或硅 - 锗衬底的硅或硅 - 锗沉积的选择性影响

    公开(公告)号:US08481378B2

    公开(公告)日:2013-07-09

    申请号:US13279466

    申请日:2011-10-24

    Abstract: A method for selective deposition of Si or SiGe on a Si or SiGe surface exploits differences in physico-chemical surface behavior according to a difference in doping of first and second surface regions. By providing at least one first surface region with a Boron doping of a suitable concentration range and exposing the substrate surface to a cleaning and passivating ambient atmosphere in a prebake at a temperature lower or equal to 800° C., a subsequent deposition step will prevent deposition in the first surface region. This allows selective deposition in the second surface region, which is not doped with the Boron (or doped with another dopant or not doped). Several devices are, thus, provided. The method saves a usual photolithography sequence, which according to prior art is required for selective deposition of Si or SiGe in the second surface region.

    Abstract translation: 在Si或SiGe表面上选择性沉积Si或SiGe的方法根据第一和第二表面区域的掺杂差异来利用物理化学表面行为的差异。 通过提供具有适当浓度范围的硼掺杂的至少一个第一表面区域,并且在低于或等于800℃的温度下在预烘烤中将基板表面暴露于清洁和钝化环境大气中,随后的沉积步骤将防止 沉积在第一表面区域中。 这允许在不掺杂硼(或掺杂有另一掺杂剂或未掺杂)的第二表面区域中进行选择性沉积。 因此,提供了几个设备。 该方法节省了通常的光刻顺序,根据现有技术,在第二表面区域中选择性沉积Si或SiGe。

    EFFECTING SELECTIVITY OF SILICON OR SILICON-GERMANIUM DEPOSITION ON A SILICON OR SILICON-GERMANIUM SUBSTRATE BY DOPING
    6.
    发明申请
    EFFECTING SELECTIVITY OF SILICON OR SILICON-GERMANIUM DEPOSITION ON A SILICON OR SILICON-GERMANIUM SUBSTRATE BY DOPING 有权
    通过掺杂对硅或硅 - 锗基底上的硅或硅 - 锗沉积的选择性进行了研究

    公开(公告)号:US20120282747A1

    公开(公告)日:2012-11-08

    申请号:US13279466

    申请日:2011-10-24

    Abstract: A method for selective deposition of Si or SiGe on a Si or SiGe surface exploits differences in physico-chemical surface behavior according to a difference in doping of first and second surface regions. By providing at least one first surface region with a Boron doping of a suitable concentration range and exposing the substrate surface to a cleaning and passivating ambient atmosphere in a prebake at a temperature lower or equal to 800° C., a subsequent deposition step will prevent deposition in the first surface region. This allows selective deposition in the second surface region, which is not doped with the Boron (or doped with another dopant or not doped). Several devices are, thus, provided. The method saves a usual photolithography sequence, which according to prior art is required for selective deposition of Si or SiGe in the second surface region.

    Abstract translation: 在Si或SiGe表面上选择性沉积Si或SiGe的方法根据第一和第二表面区域的掺杂差异来利用物理化学表面行为的差异。 通过提供具有适当浓度范围的硼掺杂的至少一个第一表面区域,并且在低于或等于800℃的温度下在预烘烤中将基板表面暴露于清洁和钝化环境大气中,随后的沉积步骤将防止 沉积在第一表面区域中。 这允许在不掺杂硼(或掺杂有另一掺杂剂或未掺杂)的第二表面区域中进行选择性沉积。 因此,提供了几个设备。 该方法节省了通常的光刻顺序,根据现有技术,在第二表面区域中选择性沉积Si或SiGe。

    EFFECTING SELECTIVITY OF SILICON OR SILICON-GERMANIUM DEPOSITION ON A SILICON OR SILICON-GERMANIUM SUBSTRATE BY DOPING
    7.
    发明申请
    EFFECTING SELECTIVITY OF SILICON OR SILICON-GERMANIUM DEPOSITION ON A SILICON OR SILICON-GERMANIUM SUBSTRATE BY DOPING 有权
    通过掺杂对硅或硅 - 锗基底上的硅或硅 - 锗沉积的选择性进行了研究

    公开(公告)号:US20110006370A1

    公开(公告)日:2011-01-13

    申请号:US12375895

    申请日:2007-07-31

    Abstract: The invention relates to a method for selective deposition of Si or SiGe on a Si or SiGe surface. The method exploits differences in physico-chemical surface behaviour according to a difference in doping of first and second surface regions. By providing at least one first surface region with a Boron doping of a suitable concentration range and exposing the substrate surface to a cleaning and passivating ambient atmosphere in a prebake step at a temperature lower or equal than 800° C., a subsequent deposition step of Si or SiGe will not lead to a layer deposition in the first surface region. This effect is used for selective deposition of Si or SiGe in the second surface region, which is not doped with Boron in the suitable concentration range, or doped with another dopant, or not doped. The method thus saves a usual photolithography sequence required for selective deposition of Si or SiGe in the second surface region according to the prior art.

    Abstract translation: 本发明涉及用于在Si或SiGe表面上选择性沉积Si或SiGe的方法。 该方法根据第一和第二表面区域的掺杂差异,利用物理化学表面行为的差异。 通过提供具有适当浓度范围的硼掺杂的至少一个第一表面区域,并且在低于或等于800℃的温度下在预烘烤步骤中将衬底表面暴露于清洁和钝化环境气氛中,随后的沉积步骤 Si或SiGe不会导致第一表面区域中的层沉积。 该效应用于在不掺杂硼的合适浓度范围内或掺杂有另一掺杂剂的第二表面区域中选择性沉积Si或SiGe,或不掺杂。 因此,该方法节省了根据现有技术在第二表面区域中选择性沉积Si或SiGe所需的常规光刻序列。

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