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    IC card, IC chip, data assuring method and power supply monitor method
    1.
    发明授权
    IC card, IC chip, data assuring method and power supply monitor method 失效
    IC卡，IC芯片，数据保护方法和电源监控方法

    公开(公告)号：US06820208B2

    公开(公告)日：2004-11-16

    申请号：US09729162

    申请日：2000-12-05

    申请人： Masao Hoshino ,  Toshiyuki Teramoto ,  Tomomi Shiobara

    发明人： Masao Hoshino ,  Toshiyuki Teramoto ,  Tomomi Shiobara

    IPC分类号： G06F130

    CPC分类号： G06K19/0701 ,  G06F1/30 ,  G06K19/07

    摘要： An IC card of the present invention, which receives a power supply or a radio wave from an upper apparatus so as to operate an internal IC chip, has, for example, an FeRAM which can be used as a program memory and a work memory. When a power supply is broken during a writing process so as not to be supplied to the inside, a ferroelectric capacitor in the FeRAM 4 is used so that a voltage for time required for completing the writing process is secured.

    摘要翻译： 接收来自上位装置的电源或无线电波以操作内部IC芯片的本发明的IC卡具有例如可用作程序存储器和工作存储器的FeRAM。 当在写入过程中电源断开以便不向内部供电时，使用FeRAM 4中的铁电电容器，以确保完成写入处理所需的时间的电压。

    Non-volatile semiconductor memory device having EEPROM cell, dummy cell, and sense circuit for increasing reliability and enabling one-bit operation
    2.
    发明授权
    Non-volatile semiconductor memory device having EEPROM cell, dummy cell, and sense circuit for increasing reliability and enabling one-bit operation 失效
    具有EEPROM单元，虚设单元和检测电路的非易失性半导体存储器件，用于增加可靠性并实现一位操作

    公开(公告)号：US5303197A

    公开(公告)日：1994-04-12

    申请号：US690482

    申请日：1991-04-24

    申请人： Takumi Miyashita ,  Toshiyuki Teramoto ,  Haruo Koizumi

    发明人： Takumi Miyashita ,  Toshiyuki Teramoto ,  Haruo Koizumi

    IPC分类号： G11C17/00 ,  G11C16/02 ,  G11C16/04 ,  G11C16/28 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792 ,  G11C7/00

    CPC分类号： G11C16/28

    摘要： A non-volatile semiconductor memory device comprises an EEPROM cell, a dummy cell, and a sense circuit. The EEPROM cell, the dummy cell and the sense circuit are operatively connected to a drain column line and a control column line, and the sense circuit reads out the content written in the EEPROM cell by the difference between a current flowing through the EEPROM cell from the drain column line and a current flowing through the dummy cell from the control column line. Consequently, write/erase operations of data for each one bit can be carried out in one operation, and access time can be shortened and deterioration of a cell transistor can be decreased in a read-out operation.

    摘要翻译： 非易失性半导体存储器件包括EEPROM单元，虚设单元和感测电路。 EEPROM单元，虚拟单元和感测电路可操作地连接到排列列线和控制列线，并且感测电路通过流过EEPROM单元的电流之间的差读出EEPROM单元中写入的内容 漏极列线和从控制柱线流过虚拟电池的电流。 因此，可以在一个操作中执行每一位的数据的写入/擦除操作，并且可以缩短访问时间，并且在读出操作中可以减小单元晶体管的劣化。