公开(公告)号：US20120221783A1

公开(公告)日：2012-08-30

申请号：US13466163

申请日：2012-05-08

申请人： Masayuki YAMAMOTO ,  Akira YAMAMOTO ,  Akira FUJIBAYASHI ,  Jun KITAHARA ,  Yoshiki KANO

发明人： Masayuki YAMAMOTO ,  Akira YAMAMOTO ,  Akira FUJIBAYASHI ,  Jun KITAHARA ,  Yoshiki KANO

IPC分类号： G06F12/00

CPC分类号： G06F12/0246 ,  G06F3/0616 ,  G06F3/0644 ,  G06F3/0685 ,  G06F2212/1036 ,  G06F2212/7206

摘要： For a storage apparatus where flash memory disks and hard disks coexist, high-density mounting of flash memory modules is achieved. The storage apparatus includes flash memories and a storage controller. A second storage apparatus including magnetic disks is connected to the storage apparatus. The storage controller can form a storage area using a flash memory or a magnetic disk to create a logical volume. When an input/output request is issued from a host computer, if a storage area is formed with a flash memory, the storage controller directly accesses the flash memory to handle the request. When the storage apparatus defines a storage area formed with a flash memory, the storage apparatus defines the storage area by adding up the capacity of a storage area to be provided for the host computer and a substitute area capacity determined in consideration of restrictions on the number deletions of the flash memory.

摘要翻译： 对于闪存盘和硬盘共存的存储装置，实现了高密度安装闪存模块。 存储装置包括闪存和存储控制器。 包括磁盘的第二存储装置连接到存储装置。 存储控制器可以使用闪存或磁盘形成存储区域以创建逻辑卷。 当从主计算机发出输入/输出请求时，如果存储区域形成闪速存储器，则存储控制器直接访问闪存以处理该请求。 当存储装置定义形成有闪速存储器的存储区域时，存储装置通过将要提供给主计算机的存储区域的容量相加来确定存储区域，并且考虑到对数量的限制而确定的替代区域容量 闪存的删除。

公开(公告)号：US20120274848A1

公开(公告)日：2012-11-01

申请号：US13452376

申请日：2012-04-20

申请人： Jun KITAHARA ,  Naohisa Kitazato ,  Yoshiharu Dewa ,  Yasuaki Yamagishi

发明人： Jun KITAHARA ,  Naohisa Kitazato ,  Yoshiharu Dewa ,  Yasuaki Yamagishi

IPC分类号： H04N7/00

CPC分类号： H04N21/4349 ,  H04H20/40 ,  H04H20/93 ,  H04H60/13 ,  H04H2201/37 ,  H04N21/23617 ,  H04N21/4302 ,  H04N21/47214 ,  H04N21/478 ,  H04N21/482 ,  H04N21/6543 ,  H04N21/858

摘要： The present disclosure provides a receiving device including, a receiver that receives AV content, a detector, an acquirer, a tentative reservation registering part, and a definitive reservation registering part.

摘要翻译： 本公开提供了一种接收装置，包括：接收AV内容的接收器，检测器，获取器，暂定预约登记部分和确定预约登记部分。

公开(公告)号：US20100241797A1

公开(公告)日：2010-09-23

申请号：US12791915

申请日：2010-06-02

申请人： Jun KITAHARA

发明人： Jun KITAHARA

IPC分类号： G06F12/16 ,  G06F12/02

CPC分类号： G11C29/765 ,  G06F3/0616 ,  G06F3/064 ,  G06F3/0688 ,  G11C16/3495 ,  G11C29/76

摘要： To enable a capacity of an entire storage device to be kept by adding a flash drive or a flash module in the flash drive for a flash memory that has a failure, even if the storage device using the flash memory has a failure in its part such as a part of flash memory chip has a failure, for example, the flash memory chip has run out of its lifetime. In a storage device equipped with two or more memory device units with a plurality of semiconductor memory devices, each of which has a functional capacity unit smaller than a capacity of an entire semiconductor memory device and has a writing lifetime for each functional capacity unit, only a functional capacity unit whose writing lifetime is run out to be determined as unable to be written is substituted by a functional capacity unit in a memory device of the other memory device unit to keep a predetermined capacity of the entire device.

摘要翻译： 为了使整个存储设备的容量能够通过将flash驱动器或闪存模块添加到具有故障的闪存的闪存驱动器中，即使使用闪速存储器的存储设备在其部分中出现故障， 作为闪存芯片的一部分存在故障，例如，闪存芯片已经耗尽其使用寿命。 在配备有具有多个半导体存储器件的两个以上的存储器件单元的存储器件中，每个存储器件的功能容量单元小于整个半导体存储器件的容量并且具有每个功能容量单元的写入寿命 写入寿命被确定为不能被写入的功能容量单元被另一个存储器件单元的存储器件中的功能容量单元代替以保持整个器件的预定容量。

公开(公告)号：US20090292862A1

公开(公告)日：2009-11-26

申请号：US12168269

申请日：2008-07-07

申请人： Jun KITAHARA

发明人： Jun KITAHARA

IPC分类号： G06F12/02

CPC分类号： G06F12/0246 ,  G06F2212/7201

摘要： A storage controller manages address conversion information denoting the correspondence relationship between a logical address and a physical address of storage area (for example, a physical block) inside a flash memory. The storage controller uses the above-mentioned address conversion information to specify a physical address corresponding to a logical address specified by an I/O request from a higher-level device, and sends an I/O command including I/O-destination information based on the specified physical address to a memory controller inside a flash memory module. The memory controller carries out the I/O with respect to a storage area inside a flash memory specified from the I/O-destination information of the I/O command from the storage controller.

摘要翻译： 存储控制器管理表示闪速存储器内的存储区域（例如，物理块）的逻辑地址和物理地址之间的对应关系的地址转换信息。 存储控制器使用上述地址转换信息来指定与来自上级装置的I / O请求指定的逻辑地址对应的物理地址，并且发送包括I / O目的地信息的I / O命令 指定的物理地址到闪存模块内的内存控制器。 存储器控制器相对于从存储控制器从I / O命令的I / O目的地信息指定的闪速存储器内的存储区域执行I / O。

公开(公告)号：US20090132875A1

公开(公告)日：2009-05-21

申请号：US12026738

申请日：2008-02-06

申请人： Jun KITAHARA ,  Nagamasa Mizushima

发明人： Jun KITAHARA ,  Nagamasa Mizushima

IPC分类号： G11C29/00

CPC分类号： G06F11/1068 ,  G11C16/3418

摘要： According to this invention, a highly reliable memory device that uses up a life of a flash memory can be provided. The memory device is a nonvolatile memory device including a plurality of memory cells, in which: each of the plurality of memory cells is an FET which includes a floating gate; the plurality of memory cells are divided into a plurality of deletion blocks; and the nonvolatile memory device reads data stored in a first deletion block, detects and corrects an error contained in the read data, stores, when the number of bits of the detected error exceeds a threshold, the corrected data in a second deletion block, sets a smaller value as the threshold as an error frequency detected in the first deletion block is higher, and sets a smaller value as the threshold as the number of deletion times executed in the first deletion block is larger.

摘要翻译： 根据本发明，可以提供使用快闪存储器寿命的高度可靠的存储器件。 存储器件是包括多个存储单元的非易失性存储器件，其中：多个存储器单元中的每一个都是包括浮置栅极的FET; 多个存储单元被分成多个删除块; 并且非易失性存储器件读取存储在第一删除块中的数据，检测并校正读取数据中包含的错误，当检测到的错误的位数超过阈值时，存储第二删除块中的校正数据 作为在第一删除块中检测到的错误频率的阈值的较小值较高，并且随着在第一删除块中执行的删除次数的数量较大，将较小的值设置为阈值。

公开(公告)号：US20080288814A1

公开(公告)日：2008-11-20

申请号：US11968724

申请日：2008-01-03

申请人： Jun KITAHARA

发明人： Jun KITAHARA

IPC分类号： G06F11/00

CPC分类号： G11C16/3418 ,  G06F11/073 ,  G06F11/076 ,  G06F11/1068 ,  G06F11/108 ,  G06F2211/1059

摘要： Read disturb in a flash memory destroys data that is not requested to be read, and an efficient read disturb check method is therefore needed. In addition, data may be destroyed beyond repair by error correction before a read disturb check is run. Thus, this invention provides a non-volatile data storage apparatus including a plurality of memory cells and a memory controller, in which the memory controller is configured to: count how many times data read processing has been executed in memory cells within the management area; read, when the data read processing count that is counted for a first management area exceeds a first threshold, data and an error correction code that are stored in the memory cells within the first management area; decode the read error correction code; and write the data corrected by decoding the error correction code in other management areas than the first management area.

摘要翻译： 闪存中的读取干扰会破坏不被请求读取的数据，因此需要有效的读取干扰检查方法。 此外，在读取干扰检查运行之前，数据可能会被错误修正以外被破坏。 因此，本发明提供了包括多个存储单元和存储器控制器的非易失性数据存储装置，其中存储器控制器被配置为：对管理区域内的存储单元中的数据读取处理执行多少次进行计数; 当对于第一管理区域计数的数据读取处理计数超过存储在第一管理区域内的存储单元中的第一阈值，数据和纠错码时，读取; 解码读取纠错码; 并且通过在第一管理区域以外的其它管理区域中对纠错码进行解码来校正数据。

公开(公告)号：US20080098158A1

公开(公告)日：2008-04-24

申请号：US11622168

申请日：2007-01-11

申请人： Jun KITAHARA

发明人： Jun KITAHARA

IPC分类号： G06F12/00 ,  G06F12/16

CPC分类号： G11C29/765 ,  G06F3/0616 ,  G06F3/064 ,  G06F3/0688 ,  G11C16/3495 ,  G11C29/76

摘要： To enable a capacity of an entire storage device to be kept by adding a flash drive or a flash module in the flash drive for a flash memory that has a failure, even if the storage device using the flash memory has a failure in its part such as a part of flash memory chip has a failure, for example, the flash memory chip has run out of its lifetime. In a storage device 101 equipped with two or more memory device units 105 with a plurality of semiconductor memory devices 107, each of which has a functional capacity unit 109 smaller than a capacity of an entire semiconductor memory device and has a writing lifetime for each functional capacity unit, only a functional capacity unit whose writing lifetime is run out to be determined as unable to be written is substituted by a functional capacity unit in a memory device of the other memory device unit to keep a predetermined capacity of the entire device.

摘要翻译： 为了使整个存储设备的容量能够通过将flash驱动器或闪存模块添加到具有故障的闪存的闪存驱动器中，即使使用闪速存储器的存储设备在其部分中出现故障， 作为闪存芯片的一部分存在故障，例如，闪存芯片已经耗尽其使用寿命。 在配备有具有多个半导体存储器件107的两个以上的存储器件单元105的存储器件101中，每个具有比半导体存储器件的整体容量小的功能容量单元109，并且具有每个功能的写入寿命 容量单元，只有其写入寿命被确定为不能被写入的功能容量单元被另一个存储器件单元的存储器件中的功能容量单元代替以保持整个器件的预定容量。

公开(公告)号：US20120191906A1

公开(公告)日：2012-07-26

申请号：US13440792

申请日：2012-04-05

申请人： Jun KITAHARA

发明人： Jun KITAHARA

IPC分类号： G06F12/02

CPC分类号： G06F12/0246 ,  G06F2212/7201

摘要： A storage controller manages address conversion information denoting the correspondence relationship between a logical address and a physical address of storage area (for example, a physical block) inside a flash memory. The storage controller uses the above-mentioned address conversion information to specify a physical address corresponding to a logical address specified by an I/O request from a higher-level device, and sends an I/O command including I/O-destination information based on the specified physical address to a memory controller inside a flash memory module. The memory controller carries out the I/O with respect to a storage area inside a flash memory specified from the I/O-destination information of the I/O command from the storage controller.

摘要翻译： 存储控制器管理表示闪速存储器内的存储区域（例如，物理块）的逻辑地址和物理地址之间的对应关系的地址转换信息。 存储控制器使用上述地址转换信息来指定与来自上级装置的I / O请求指定的逻辑地址对应的物理地址，并且发送包括I / O目的地信息的I / O命令 指定的物理地址到闪存模块内的内存控制器。 存储器控制器相对于从存储控制器从I / O命令的I / O目的地信息指定的闪速存储器内的存储区域执行I / O。

公开(公告)号：US20120297244A1

公开(公告)日：2012-11-22

申请号：US13549822

申请日：2012-07-16

申请人： Jun KITAHARA ,  Masanori TAKADA ,  Sadahiro SUGIMOTO

发明人： Jun KITAHARA ,  Masanori TAKADA ,  Sadahiro SUGIMOTO

IPC分类号： G06F12/16 ,  G06F12/02 ,  G06F11/14

CPC分类号： G06F3/0658 ,  G06F3/0604 ,  G06F3/0613 ,  G06F3/0659 ,  G06F3/0679 ,  G06F3/0688 ,  G06F11/108 ,  G06F2211/1054

摘要： The storage system includes a plurality of flash memory devices, each of the flash memory devices including a flash memory controller and flash memory chips, which are configured as a RAID group and a storage controller, coupled to the plurality of flash memory devices, configured to receive data from a computer and send the data to a first flash memory device of the plurality of flash memory devices. The flash memory controller of the flash memory device is configured to receive the data from the storage controller and execute a parity operation using the data.

摘要翻译： 存储系统包括多个闪速存储器设备，每个闪存器件包括闪存控制器和闪速存储器芯片，其被配置为耦合到多个闪速存储器设备的RAID组和存储控制器，配置为 从计算机接收数据并将数据发送到多个闪存设备中的第一闪存设备。 闪速存储器件的闪存控制器被配置为从存储控制器接收数据，并使用该数据执行奇偶校验操作。