公开(公告)号：US10651865B2

公开(公告)日：2020-05-12

申请号：US16025991

申请日：2018-07-02

Applicant: Massachusetts Institute of Technology

Inventor： Ayush Bhandari ,  Felix Krahmer ,  Ramesh Raskar

IPC: H03M1/12 ,  H03K3/3565 ,  H03M1/16 ,  H03M3/00

Abstract: A self-reset ADC may take a set of temporally equidistant, modulo samples of a bandlimited, analog signal, at a sampling rate that is greater than πe samples per second, where π is Archimedes' constant and is Euler's number. The bandlimited signal may have a bandwidth of 1 Hertz and a maximum frequency of 0.5 Hertz. These conditions of sampling rate, bandwidth and maximum frequency may ensure that an estimated signal may be recovered from the set of modulo samples. This estimated signal may be equal to the bandlimited signal plus a constant. The constant may be equal to an integer multiple of the modulus of the centered modulo operation employed to take the modulo samples.

公开(公告)号：US20190103876A1

公开(公告)日：2019-04-04

申请号：US16025991

申请日：2018-07-02

Applicant: Massachusetts Institute of Technology

Inventor： Ayush Bhandari ,  Felix Krahmer ,  Ramesh Raskar

IPC: H03M1/12

Abstract: A self-reset ADC may take a set of temporally equidistant, modulo samples of a bandlimited, analog signal, at a sampling rate that is greater than πe samples per second, where π is Archimedes' constant and is Euler's number. The bandlimited signal may have a bandwidth of 1 Hertz and a maximum frequency of 0.5 Hertz. These conditions of sampling rate, bandwidth and maximum frequency may ensure that an estimated signal may be recovered from the set of modulo samples. This estimated signal may be equal to the bandlimited signal plus a constant. The constant may be equal to an integer multiple of the modulus of the centered modulo operation employed to take the modulo samples.