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公开(公告)号：US20110041128A1
公开(公告)日：2011-02-17
申请号：US12540775
申请日：2009-08-13
申请人： Mathias Kohlenz , Idreas Mir , Irfan Anwar Khan , Sathyanarayan Madhusudan , Shailesh Maheshwari , Srividhya Krishnamoorthy , Sandeep Urgaonkar , Thomas Klingenbrunn , Tim Tynghuei Liou
发明人： Mathias Kohlenz , Idreas Mir , Irfan Anwar Khan , Sathyanarayan Madhusudan , Shailesh Maheshwari , Srividhya Krishnamoorthy , Sandeep Urgaonkar , Thomas Klingenbrunn , Tim Tynghuei Liou
摘要： An apparatus and method for distributed data processing is described herein. A main processor programs a mini-processor to process an incoming data stream. The mini-processor is located in close proximity to hardware components operating on the input data stream. A copy engine is also provided for copying data from multiple protocol data units in a single copy operation.
摘要翻译： 本文描述了用于分布式数据处理的装置和方法。 主处理器对微处理器进行编程以处理输入数据流。 迷你处理器位于靠近输入数据流操作的硬件组件上。 还提供了复制引擎，用于在单个复制操作中从多个协议数据单元复制数据。
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2.发明授权Data mover moving data to accelerator for processing and returning result data based on instruction received from a processor utilizing software and hardware interrupts 有权数据移动器将数据移动到加速器，以便根据使用软件和硬件中断从处理器接收的指令来处理和返回结果数据公开(公告)号：US09038073B2
公开(公告)日：2015-05-19
申请号：US12540749
申请日：2009-08-13
申请人： Mathias Kohlenz , Irfan Anwar Khan , Sathyanarayan Madhusudan , Shailesh Maheshwari , Srividhya Krishnamoorthy , Sandeep Urgaonkar , Thomas Klingenbrunn , Tim Tynghuei Liou , Idreas Mir
发明人： Mathias Kohlenz , Irfan Anwar Khan , Sathyanarayan Madhusudan , Shailesh Maheshwari , Srividhya Krishnamoorthy , Sandeep Urgaonkar , Thomas Klingenbrunn , Tim Tynghuei Liou , Idreas Mir
CPC分类号： G06F9/4843 , G06F9/3826 , G06F9/4812 , G06F9/5044 , Y02D10/22 , Y02D10/24
摘要： Efficient data processing apparatus and methods include hardware components which are pre-programmed by software. Each hardware component triggers the other to complete its tasks. After the final pre-programmed hardware task is complete, the hardware component issues a software interrupt.
摘要翻译： 有效的数据处理装置和方法包括由软件预编程的硬件组件。 每个硬件组件触发另一个完成其任务。 最终的预编程硬件任务完成后，硬件组件发出软件中断。
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公开(公告)号：US20110041127A1
公开(公告)日：2011-02-17
申请号：US12540749
申请日：2009-08-13
申请人： Mathias Kohlenz , Irfan Anwar Khan , Sathyanarayan Madhusudan , Shailesh Maheshwari , Srividhya Krishnamoorthy , Sandeep Urgaonkar , Thomas Klingenbrunn , Tim Tynghuei Liou , Idreas Mir
发明人： Mathias Kohlenz , Irfan Anwar Khan , Sathyanarayan Madhusudan , Shailesh Maheshwari , Srividhya Krishnamoorthy , Sandeep Urgaonkar , Thomas Klingenbrunn , Tim Tynghuei Liou , Idreas Mir
CPC分类号： G06F9/4843 , G06F9/3826 , G06F9/4812 , G06F9/5044 , Y02D10/22 , Y02D10/24
摘要： Efficient data processing apparatus and methods include hardware components which are pre-programmed by software. Each hardware component triggers the other to complete its tasks. After the final pre-programmed hardware task is complete, the hardware component issues a software interrupt.
摘要翻译： 有效的数据处理装置和方法包括由软件预编程的硬件组件。 每个硬件组件触发另一个完成其任务。 最终的预编程硬件任务完成后，硬件组件发出软件中断。
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公开(公告)号：US20110040948A1
公开(公告)日：2011-02-17
申请号：US12540761
申请日：2009-08-13
申请人： Mathias Kohlenz , Idreas Mir , Irfan Anwar Khan , Sathyanarayanan Medhusudan , Shailesh Maheshwari , Srividhya Krishnamoorthy , Sandeep Urgaonkar , Thomas Klingenbrunn , Tim Tynghuei Liou
发明人： Mathias Kohlenz , Idreas Mir , Irfan Anwar Khan , Sathyanarayanan Medhusudan , Shailesh Maheshwari , Srividhya Krishnamoorthy , Sandeep Urgaonkar , Thomas Klingenbrunn , Tim Tynghuei Liou
CPC分类号： H04L49/9005 , H04L49/90 , H04L49/901 , H04L49/9042
摘要： Incoming data frames are parsed by a hardware component. Headers are extracted and stored in a first location along with a pointer to the associated payload. Payloads are stored in a single, contiguous memory location.
摘要翻译： 传入的数据帧由硬件组件解析。 标题被提取并存储在与指示相关联的有效载荷的指针的第一位置中。 有效载荷存储在单个连续的内存位置。
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5.发明申请公开(公告)号：US20110040947A1
公开(公告)日：2011-02-17
申请号：US12540756
申请日：2009-08-13
申请人： Mathias Kohlenz , Idreas Mir , Irfan Anwar Khan , Sathyanarayanan Madhusudan , Shailesh Maheshwari , Srividhya Krishnamoorthy , Sandeep Urgaonkar , Thomas Klingenbrunn , Tim Tynghuei Liou
发明人： Mathias Kohlenz , Idreas Mir , Irfan Anwar Khan , Sathyanarayanan Madhusudan , Shailesh Maheshwari , Srividhya Krishnamoorthy , Sandeep Urgaonkar , Thomas Klingenbrunn , Tim Tynghuei Liou
CPC分类号： G06F9/5016 , Y02D10/22
摘要： Multiple memory pools are defined in hardware for operating on data. At least one memory pool has a lower latency that the other memory pools. Hardware components operate directly on data in the lower latency memory pool.
摘要翻译： 硬件中定义了多个内存池，用于对数据进行操作。 至少一个内存池对其他内存池的延迟较低。 硬件组件直接对低延迟内存池中的数据进行操作。
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公开(公告)号：US08762532B2
公开(公告)日：2014-06-24
申请号：US12540761
申请日：2009-08-13
申请人： Mathias Kohlenz , Idreas Mir , Irfan Anwar Khan , Madhusudan Sathyanarayan , Shailesh Maheshwari , Srividhya Krishnamoorthy , Sandeep Urgaonkar , Thomas Klingenbrunn , Tim Tynghuei Liou
发明人： Mathias Kohlenz , Idreas Mir , Irfan Anwar Khan , Madhusudan Sathyanarayan , Shailesh Maheshwari , Srividhya Krishnamoorthy , Sandeep Urgaonkar , Thomas Klingenbrunn , Tim Tynghuei Liou
CPC分类号： H04L49/9005 , H04L49/90 , H04L49/901 , H04L49/9042
摘要： Incoming data frames are parsed by a hardware component. Headers are extracted and stored in a first location along with a pointer to the associated payload. Payloads are stored in a single, contiguous memory location.
摘要翻译： 传入的数据帧由硬件组件解析。 标题被提取并存储在与指示相关联的有效载荷的指针的第一位置中。 有效载荷存储在单个连续的内存位置。
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7.发明授权公开(公告)号：US08788782B2
公开(公告)日：2014-07-22
申请号：US12540756
申请日：2009-08-13
申请人： Mathias Kohlenz , Idreas Mir , Irfan Anwar Khan , Sathyanarayan Madhusudan , Shailesh Maheshwari , Srividhya Krishnamoorthy , Sandeep Urgaonkar , Thomas Klingenbrunn , Tim Liou
发明人： Mathias Kohlenz , Idreas Mir , Irfan Anwar Khan , Sathyanarayan Madhusudan , Shailesh Maheshwari , Srividhya Krishnamoorthy , Sandeep Urgaonkar , Thomas Klingenbrunn , Tim Liou
CPC分类号： G06F9/5016 , Y02D10/22
摘要： Multiple memory pools are defined in hardware for operating on data. At least one memory pool has a lower latency that the other memory pools. Hardware components operate directly on data in the lower latency memory pool.
摘要翻译： 硬件中定义了多个内存池，用于对数据进行操作。 至少一个内存池对其他内存池的延迟较低。 硬件组件直接对较低延迟内存池中的数据进行操作。
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公开(公告)号：US08898448B2
公开(公告)日：2014-11-25
申请号：US12487576
申请日：2009-06-18
申请人： Thomas Klingenbrunn , Uppinder S. Babbar , Vanitha A. Kumar , Vikas Nagpal , Sriram Narayan , Samson Jim , Shailesh Maheshwari , Marcello V. Lioy , Mathias Kohlenz , Idreas Mir , Irfan A. Khan , Gurvinder S. Chhabra , Jean-Marie QD Tran
发明人： Thomas Klingenbrunn , Uppinder S. Babbar , Vanitha A. Kumar , Vikas Nagpal , Sriram Narayan , Samson Jim , Shailesh Maheshwari , Marcello V. Lioy , Mathias Kohlenz , Idreas Mir , Irfan A. Khan , Gurvinder S. Chhabra , Jean-Marie QD Tran
IPC分类号： H04L29/06 , H04W12/02 , H04L12/801 , H04L9/06 , H04L12/861 , H04W80/02
CPC分类号： H04W12/02 , H04L9/065 , H04L47/10 , H04L49/90 , H04L63/0457 , H04L2209/122 , H04L2209/26 , H04L2209/80 , H04W80/02
摘要： Systems and methods for wireless communications are provided. These include data deciphering components, interrupt processing components, adaptive aggregations methods, optimized data path processing, buffer pool processing, application processing where data is formatted in a suitable format for a destination process, and Keystream bank processing among other hardware acceleration features. Such systems and methods are provided to simplify logic designs and mitigate processing steps during wireless network data processing.
摘要翻译： 提供了无线通信的系统和方法。 这些包括数据解密组件，中断处理组件，自适应聚合方法，优化的数据路径处理，缓冲池处理，数据以目的地处理的合适格式格式化的应用处理，以及其他硬件加速特征之间的密钥库处理。 提供这样的系统和方法以简化逻辑设计并减轻无线网络数据处理期间的处理步骤。
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公开(公告)号：US20090316904A1
公开(公告)日：2009-12-24
申请号：US12487576
申请日：2009-06-18
申请人： Thomas Klingenbrunn , Uppinder S. Babbar , Vanitha A. Kumar , Vikas Nagpal , Sriram Narayan , Samson Jim , Shailesh Maheshwari , Marcello V. Lioy , Mathias Kohlenz , Idreas Mir , Irfan A. Khan , Gurvinder S. Chhabra , Jean-Marie QD Tran
发明人： Thomas Klingenbrunn , Uppinder S. Babbar , Vanitha A. Kumar , Vikas Nagpal , Sriram Narayan , Samson Jim , Shailesh Maheshwari , Marcello V. Lioy , Mathias Kohlenz , Idreas Mir , Irfan A. Khan , Gurvinder S. Chhabra , Jean-Marie QD Tran
CPC分类号： H04W12/02 , H04L9/065 , H04L47/10 , H04L49/90 , H04L63/0457 , H04L2209/122 , H04L2209/26 , H04L2209/80 , H04W80/02
摘要： Systems and methods for wireless communications are provided. These include data deciphering components, interrupt processing components, adaptive aggregations methods, optimized data path processing, buffer pool processing, application processing where data is formatted in a suitable format for a destination process, and Keystream bank processing among other hardware acceleration features. Such systems and methods are provided to simplify logic designs and mitigate processing steps during wireless network data processing.
摘要翻译： 提供了无线通信的系统和方法。 这些包括数据解密组件，中断处理组件，自适应聚合方法，优化的数据路径处理，缓冲池处理，数据以目的地处理的合适格式格式化的应用处理，以及其他硬件加速特征之间的密钥库处理。 提供这样的系统和方法以简化逻辑设计并减轻无线网络数据处理期间的处理步骤。
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