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公开(公告)号：US06822486B1
公开(公告)日：2004-11-23
申请号：US10635968
申请日：2003-08-07
申请人： Matthew E. King , Peichun Liu , David Mui , Jieming Qi
发明人： Matthew E. King , Peichun Liu , David Mui , Jieming Qi
IPC分类号： H03K1700
CPC分类号： H04J3/047
摘要： In a first aspect, a method is provided for selecting a signal from a plurality of signals. The method includes the steps of (1) providing a plurality of multiplexers, each multiplexer configured to selectively output one of a plurality of signals input by the multiplexer using an output of the multiplexer; (2) selecting an input signal from one of the plurality of multiplexers to output; (3) outputting the selected input signal from the output of the one of the plurality of multiplexers; (4) forcing the outputs of the other of the plurality of multiplexers to a predetermined logic state; and (5) combining the outputs of the plurality of multiplexers so as to output the selected input signal. Numerous other aspects are provided.
摘要翻译： 在第一方面，提供一种用于从多个信号中选择信号的方法。 该方法包括以下步骤：（1）提供多个复用器，每个多路复用器被配置为使用多路复用器的输出来选择性地输出由多路复用器输入的多个信号中的一个信号; （2）选择来自多个多路复用器中的一个的输入信号进行输出; （3）从所述多个复用器中的一个的输出端输出所选择的输入信号; （4）将所述多个复用器中的另一个的输出强制为预定的逻辑状态; 以及（5）组合多个复用器的输出以输出所选择的输入信号。 提供了许多其他方面。
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公开(公告)号：US20080065855A1
公开(公告)日：2008-03-13
申请号：US11531293
申请日：2006-09-13
申请人： Matthew E. King , Peichun P. Liu , David Mui , Mydung N. Pham , Jieming Qi , Thuong Q. Truong
发明人： Matthew E. King , Peichun P. Liu , David Mui , Mydung N. Pham , Jieming Qi , Thuong Q. Truong
CPC分类号： G06F13/28 , G06F12/1045 , G06F12/1081 , G06F12/145
摘要： A memory management unit (MMU) performs address translation and protection using a segment table and page table model. Each DMA queue entry may include a MMU-miss dependency flag. The DMA issue mechanism uses the MMU-miss dependency flag to block the issue of commands that are known to result in a translation miss. However, the direct memory access engine does not block subsequent DMA commands from being issued until they receive a translation miss. When the MMU completes processing of a miss, the MMU sends a miss clear signal to the DMA control unit to reset all MMU-miss dependency flags. When the MMU sends a miss clear signal, the DMA control unit will reset all DMA queue entries with MMU-miss dependency flags set. DMA commands in the DMA queue that were blocked from issue by the MMU-miss dependency flag may now be selected by the DMA control unit for issue.
摘要翻译： 存储器管理单元（MMU）使用段表和页表模型执行地址转换和保护。 每个DMA队列条目可以包括MMU-miss依赖标志。 DMA问题机制使用MMU-miss依赖标志来阻止已知导致翻译缺失的命令的问题。 然而，直接存储器访问引擎不会阻止随后的DMA命令被发出，直到它们接收到转换未命中。 当MMU完成未命中的处理时，MMU向DMA控制单元发送未命中清除信号，以复位所有MMU-miss依赖标志。 当MMU发送未命中清除信号时，DMA控制单元将重置所有设置了MMU-miss依赖标志的DMA队列条目。 DMA控制单元现在可以由DMA控制单元选择DMA队列中的DMA命令，由MMU-miss依赖标志阻止发布。
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公开(公告)号：US20100161846A1
公开(公告)日：2010-06-24
申请号：US12342501
申请日：2008-12-23
申请人： Brian K. Flachs , Harm P. Hofstee , Charles R. Johns , Matthew E. King , John S. Liberty , Brad W. Michael
发明人： Brian K. Flachs , Harm P. Hofstee , Charles R. Johns , Matthew E. King , John S. Liberty , Brad W. Michael
IPC分类号： G06F3/00
CPC分类号： G06F9/30087 , G06F9/3877 , G06F13/1663 , G06F13/28
摘要： A mechanism programming a direct memory access engine operating as a multithreaded processor is provided. A plurality of programs is received from a host processor in a local memory associated with the direct memory access engine. A request is received in the direct memory access engine from the host processor indicating that the plurality of programs located in the local memory is to be executed. The direct memory access engine executes two or more of the plurality of programs without intervention by a host processor. As each of the two or more of the plurality of programs completes execution, the direct memory access engine sends a completion notification to the host processor that indicates that the program has completed execution.
摘要翻译： 提供了编程作为多线程处理器操作的直接存储器访问引擎的机制。 从与直接存储器访问引擎相关联的本地存储器中的主机处理器接收多个程序。 在来自主机处理器的直接存储器访问引擎中接收到指示将要执行位于本地存储器中的多个程序的请求。 直接存储器访问引擎在主机处理器的干预下执行多个程序中的两个或多个。 当多个程序中的两个或更多个程序中的每一个完成执行时，直接存储器访问引擎向主处理器发送指示程序已经完成执行的完成通知。
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公开(公告)号：US20120246354A1
公开(公告)日：2012-09-27
申请号：US13488856
申请日：2012-06-05
申请人： Brian K. Flachs , Harm P. Hofstee , Charles R. Johns , Matthew E. King , John S. Liberty , Brad W. Michael
发明人： Brian K. Flachs , Harm P. Hofstee , Charles R. Johns , Matthew E. King , John S. Liberty , Brad W. Michael
IPC分类号： G06F13/28
CPC分类号： G06F9/30087 , G06F9/3877 , G06F13/1663 , G06F13/28
摘要： A mechanism programming a direct memory access engine operating as a multithreaded processor is provided. A plurality of programs is received from a host processor in a local memory associated with the direct memory access engine. A request is received in the direct memory access engine from the host processor indicating that the plurality of programs located in the local memory is to be executed. The direct memory access engine executes two or more of the plurality of programs without intervention by a host processor. As each of the two or more of the plurality of programs completes execution, the direct memory access engine sends a completion notification to the host processor that indicates that the program has completed execution.
摘要翻译： 提供了编程作为多线程处理器操作的直接存储器访问引擎的机制。 从与直接存储器访问引擎相关联的本地存储器中的主机处理器接收多个程序。 在来自主机处理器的直接存储器访问引擎中接收到指示将要执行位于本地存储器中的多个程序的请求。 直接存储器访问引擎在主机处理器的干预下执行多个程序中的两个或多个。 当多个程序中的两个或更多个程序中的每一个完成执行时，直接存储器访问引擎向主处理器发送指示程序已经完成执行的完成通知。
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公开(公告)号：US08230136B2
公开(公告)日：2012-07-24
申请号：US12950231
申请日：2010-11-19
申请人： Brian K. Flachs , Harm P. Hofstee , Charles R. Johns , Matthew E. King , John S. Liberty , Brad W. Michael
发明人： Brian K. Flachs , Harm P. Hofstee , Charles R. Johns , Matthew E. King , John S. Liberty , Brad W. Michael
IPC分类号： G06F13/38
CPC分类号： G06F9/30087 , G06F9/3877 , G06F13/1663 , G06F13/28
摘要： A mechanism programming a direct memory access engine operating as a multithreaded processor is provided. A plurality of programs is received from a host processor in a local memory associated with the direct memory access engine. A request is received in the direct memory access engine from the host processor indicating that the plurality of programs located in the local memory is to be executed. The direct memory access engine executes two or more of the plurality of programs without intervention by a host processor. As each of the two or more of the plurality of programs completes execution, the direct memory access engine sends a completion notification to the host processor that indicates that the program has completed execution.
摘要翻译： 提供了编程作为多线程处理器操作的直接存储器访问引擎的机制。 从与直接存储器访问引擎相关联的本地存储器中的主机处理器接收多个程序。 在来自主机处理器的直接存储器访问引擎中接收到指示将要执行位于本地存储器中的多个程序的请求。 直接存储器访问引擎在主机处理器的干预下执行多个程序中的两个或多个。 当多个程序中的两个或更多个程序中的每一个完成执行时，直接存储器访问引擎向主处理器发送指示程序已经完成执行的完成通知。
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公开(公告)号：US08918553B2
公开(公告)日：2014-12-23
申请号：US13488856
申请日：2012-06-05
申请人： Brian K. Flachs , Harm P. Hofstee , Charles R. Johns , Matthew E. King , John S. Liberty , Brad W. Michael
发明人： Brian K. Flachs , Harm P. Hofstee , Charles R. Johns , Matthew E. King , John S. Liberty , Brad W. Michael
CPC分类号： G06F9/30087 , G06F9/3877 , G06F13/1663 , G06F13/28
摘要： A mechanism programming a direct memory access engine operating as a multithreaded processor is provided. A plurality of programs is received from a host processor in a local memory associated with the direct memory access engine. A request is received in the direct memory access engine from the host processor indicating that the plurality of programs located in the local memory is to be executed. The direct memory access engine executes two or more of the plurality of programs without intervention by a host processor. As each of the two or more of the plurality of programs completes execution, the direct memory access engine sends a completion notification to the host processor that indicates that the program has completed execution.
摘要翻译： 提供了编程作为多线程处理器操作的直接存储器访问引擎的机制。 从与直接存储器访问引擎相关联的本地存储器中的主机处理器接收多个程序。 在来自主机处理器的直接存储器访问引擎中接收到指示将要执行位于本地存储器中的多个程序的请求。 直接存储器访问引擎在主机处理器的干预下执行多个程序中的两个或多个。 当多个程序中的两个或更多个程序中的每一个完成执行时，直接存储器访问引擎向主处理器发送指示程序已经完成执行的完成通知。
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公开(公告)号：US20110066769A1
公开(公告)日：2011-03-17
申请号：US12950231
申请日：2010-11-19
申请人： Brian K. Flachs , Harm P. Hofstee , Charles R. Johns , Matthew E. King , John S. Liberty , Brad W. Michael
发明人： Brian K. Flachs , Harm P. Hofstee , Charles R. Johns , Matthew E. King , John S. Liberty , Brad W. Michael
IPC分类号： G06F13/28
CPC分类号： G06F9/30087 , G06F9/3877 , G06F13/1663 , G06F13/28
摘要： A mechanism programming a direct memory access engine operating as a multithreaded processor is provided. A plurality of programs is received from a host processor in a local memory associated with the direct memory access engine. A request is received in the direct memory access engine from the host processor indicating that the plurality of programs located in the local memory is to be executed. The direct memory access engine executes two or more of the plurality of programs without intervention by a host processor. As each of the two or more of the plurality of programs completes execution, the direct memory access engine sends a completion notification to the host processor that indicates that the program has completed execution.
摘要翻译： 提供了编程作为多线程处理器操作的直接存储器访问引擎的机制。 从与直接存储器访问引擎相关联的本地存储器中的主机处理器接收多个程序。 在来自主机处理器的直接存储器访问引擎中接收到指示将要执行位于本地存储器中的多个程序的请求。 直接存储器访问引擎在主机处理器的干预下执行多个程序中的两个或多个。 当多个程序中的两个或更多个程序中的每一个完成执行时，直接存储器访问引擎向主处理器发送指示程序已经完成执行的完成通知。
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公开(公告)号：US07870309B2
公开(公告)日：2011-01-11
申请号：US12342501
申请日：2008-12-23
申请人： Brian K. Flachs , Harm P. Hofstee , Charles R. Johns , Matthew E. King , John S. Liberty , Brad W. Michael
发明人： Brian K. Flachs , Harm P. Hofstee , Charles R. Johns , Matthew E. King , John S. Liberty , Brad W. Michael
IPC分类号： G06F13/14
CPC分类号： G06F9/30087 , G06F9/3877 , G06F13/1663 , G06F13/28
摘要： A mechanism programming a direct memory access engine operating as a multithreaded processor is provided. A plurality of programs is received from a host processor in a local memory associated with the direct memory access engine. A request is received in the direct memory access engine from the host processor indicating that the plurality of programs located in the local memory is to be executed. The direct memory access engine executes two or more of the plurality of programs without intervention by a host processor. As each of the two or more of the plurality of programs completes execution, the direct memory access engine sends a completion notification to the host processor that indicates that the program has completed execution.
摘要翻译： 提供了编程作为多线程处理器操作的直接存储器访问引擎的机制。 从与直接存储器访问引擎相关联的本地存储器中的主机处理器接收多个程序。 在来自主机处理器的直接存储器访问引擎中接收到指示将要执行位于本地存储器中的多个程序的请求。 直接存储器访问引擎在主机处理器的干预下执行多个程序中的两个或多个。 当多个程序中的两个或更多个程序中的每一个完成执行时，直接存储器访问引擎向主处理器发送指示程序已经完成执行的完成通知。
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