Method and processor for classifying data packet units
    1.
    发明授权
    Method and processor for classifying data packet units 有权
    用于分类数据包单元的方法和处理器

    公开(公告)号:US07751319B2

    公开(公告)日:2010-07-06

    申请号:US11528760

    申请日:2006-09-28

    IPC分类号: H04L12/26

    CPC分类号: H04L45/742 H04L69/22

    摘要: In a method for classifying data packet units, each comprising a group of data packet parameters which comprises a plurality of data packet parameters, a subgroup of data packet parameters for configuring a classification key is selected, the data packet units are divided into data packet classes on the basis of the classification key and a selected classification algorithm, and the data packet units are allocated to further data packet parameters which correspond to the respective data packet class.

    摘要翻译: 在分类数据分组单元的方法中,每个数据分组包括包括多个数据分组参数的一组数据分组参数,选择用于配置分类密钥的数据分组参数子组,数据分组单元被划分为数据分组类 基于分类密钥和所选择的分类算法,并且将数据分组单元分配给与各个数据分组类别相对应的另外的数据分组参数。

    Method and processor for classifying data packet units
    2.
    发明申请
    Method and processor for classifying data packet units 有权
    用于分类数据包单元的方法和处理器

    公开(公告)号:US20070070900A1

    公开(公告)日:2007-03-29

    申请号:US11528760

    申请日:2006-09-28

    IPC分类号: H04L12/26

    CPC分类号: H04L45/742 H04L69/22

    摘要: In a method for classifying data packet units, each comprising a group of data packet parameters which comprises a plurality of data packet parameters, a subgroup of data packet parameters for configuring a classification key is selected, the data packet units are divided into data packet classes on the basis of the classification key and a selected classification algorithm, and the data packet units are allocated to further data packet parameters which correspond to the respective data packet class.

    摘要翻译: 在分类数据分组单元的方法中,每个数据分组包括包括多个数据分组参数的一组数据分组参数,选择用于配置分类密钥的数据分组参数子组,数据分组单元被划分为数据分组类 基于分类密钥和所选择的分类算法,并且将数据分组单元分配给与各个数据分组类别相对应的另外的数据分组参数。

    ATM-port with integrated ethernet switch interface
    3.
    发明授权
    ATM-port with integrated ethernet switch interface 有权
    ATM端口集成以太网交换机接口

    公开(公告)号:US07369568B2

    公开(公告)日:2008-05-06

    申请号:US10265177

    申请日:2002-10-04

    IPC分类号: H04J3/16 H04L12/28 G06F15/16

    摘要: An ATM-port module for an ATM-node having an Ethernet switch includes an ATM-controller; and an Ethernet-switch interface connecting it to the Ethernet switch. The switch has an Ethernet encapsulating-unit for encapsulating ATM cells processes by the ATM-controller into packets for transmission to the switch, and an Ethernet decapsulating-unit for extracting ATM cells from packets received from the switch. The module further includes a segmentation-and-reassembly unit; and a buffering-and-scheduling unit. The buffering-and-scheduling unit provides a processed enlarged-ATM-cell to the encapsulating-unit when an indication flag indicates that an ATM port is a destination port of the enlarged ATM-cell; and a processed enlarged-ATM-cell to the segmentation-and-reassembly unit when an indication flag indicates that an Ethernet port is the enlarged ATM-cell's destination port.

    摘要翻译: 具有以太网交换机的ATM节点的ATM端口模块包括ATM控制器; 以及将以太网交换机接口连接到以太网交换机。 交换机具有以太网封装单元,用于将ATM控制器的ATM信元处理封装成用于传输到交换机的分组,以及用于从交换机接收的分组中提取ATM信元的以太网解封装单元。 该模块还包括一个分段和重新组装单元; 以及缓冲和调度单元。 当指示标志指示ATM端口是放大的ATM信元的目的地端口时,缓冲和调度单元向封装单元提供经处理的扩展ATM信元; 以及当指示标志指示以太网端口是放大的ATM单元的目的地端口时,被分割和重新组装单元的经处理的放大ATM信元。

    Cache Streaming System
    4.
    发明申请
    Cache Streaming System 审中-公开
    缓存流系统

    公开(公告)号:US20120317360A1

    公开(公告)日:2012-12-13

    申请号:US13472569

    申请日:2012-05-16

    IPC分类号: G06F12/08

    CPC分类号: G06F12/0888

    摘要: A system, having a stream cache and a storage. The stream cache includes a stream cache controller adapted to control or mediate input data transmitted through the stream cache; and a stream cache memory. The stream cache memory is adapted to both store at least first portions of the input data, as determined by the stream cache controller, and to further output the stored first portions of the input data to a processor. The storage is adapted to receive and store second portions of the input data, as determined by the stream cache controller, and to further transmit the stored second portions of the input data for output to the processor.

    摘要翻译: 具有流缓存和存储的系统。 流缓存包括适于控制或调停通过流高速缓存传输的输入数据的流高速缓存控制器; 和流缓存内存。 流缓存存储器适合于存储由流高速缓存控制器确定的输入数据的至少第一部分,并且将所存储的输入数据的第一部分输出到处理器。 存储器适于接收和存储由流高速缓存控制器确定的输入数据的第二部分,并且进一步发送存储的输入数据的第二部分以输出到处理器。

    Data packet processing device
    5.
    发明授权
    Data packet processing device 有权
    数据包处理装置

    公开(公告)号:US07925798B2

    公开(公告)日:2011-04-12

    申请号:US11698670

    申请日:2007-01-26

    申请人: Raimar Thudt

    发明人: Raimar Thudt

    IPC分类号: G06F3/00

    摘要: A device for data packet processing is disclosed. In one embodiment, the device includes a processor implemented on a chip, an on-chip internal segment memory accessible by the processor, an off-chip external segment memory and a data transfer channel between the internal segment memory and the external segment memory. The external segment memory comprises first and second memory segments wherein the first and second memory segments are different in size.

    摘要翻译: 公开了一种用于数据分组处理的设备。 在一个实施例中,该设备包括在芯片上实现的处理器,由处理器可访问的片上内部段存储器,片外外部段存储器和内部段存储器与外部段存储器之间的数据传输通道。 外部段存储器包括第一和第二存储器段,其中第一和第二存储器段的大小不同。

    Process for storing transmission units and a network communications device
    6.
    发明授权
    Process for storing transmission units and a network communications device 有权
    用于存储传输单元和网络通信设备的过程

    公开(公告)号:US07423969B2

    公开(公告)日:2008-09-09

    申请号:US10967081

    申请日:2004-10-14

    申请人: Raimar Thudt

    发明人: Raimar Thudt

    IPC分类号: H04L12/50

    摘要: The present invention relates to a process for storing transmission units in interworking between networks of differing protocol structure, in particular between ATM networks and Ethernet networks, and a corresponding network communications device. In accordance with the invention a storage in a segmented memory (10) is proposed in which the segmentation is chosen in such a way that the length of a segment of the segmented memory (10) corresponds to the length of the payload of an ATM cell. The storage of transmission units in the segmented memory (10) is preferably effected in the form of lists (40) which comprise descriptor segments (100) and data segments (200). The invention facilitates efficient storage and processing of transmission units with differing data structure and length.

    摘要翻译: 本发明涉及用于将传输单元存储在不同协议结构的网络之间,特别是在ATM网络和以太网之间的互通中的过程,以及相应的网络通信设备。 根据本发明,提出了分段存储器(10)中的存储器,其中以这样的方式选择分段,使得分段存储器(10)的段的长度对应于ATM信元的有效载荷的长度 。 传输单元在分段存储器(10)中的存储优选地以包括描述符段(100)和数据段(200)的列表(40)的形式进行。 本发明有助于有效地存储和处理具有不同数据结构和长度的传输单元。

    Method for removal of ATM cells from an ATM communications device
    7.
    发明授权
    Method for removal of ATM cells from an ATM communications device 有权
    从ATM通信设备移除ATM信元的方法

    公开(公告)号:US07177281B2

    公开(公告)日:2007-02-13

    申请号:US11239004

    申请日:2005-09-30

    IPC分类号: H04L12/26

    摘要: The invention discloses removal of ATM cells from an ATM communications device. A first algorithm is provided by means of which, with the exception of a first and a last ATM cell in a frame, all newly arriving cells in the frame are removed. A second algorithm is provided by means of which all the ATM cells in a frame, from a first cell to a last cell, are removed on arrival in a queue from the ATM communications device. At a start of a transmission process, a user indicates a maximum number of ATM cells per frame, and the ATM cells using the number are transmitted when the maximum number is exceeded, the associated frame is discarded or the first algorithm is used. The invention solves this problem by defining rules whose application results in this method now being used only to a very limited extent.

    摘要翻译: 本发明公开了一种从ATM通信设备移除ATM信元。 提供了一种第一算法,除了帧中的第一和最后一个ATM信元之外,帧中的所有新到达的信元被除去。 提供了一种第二算法,通过该算法,从ATM通信设备到达队列时,从第一小区到最后一个小区的帧中的所有ATM信元都被移除。 在发送处理开始时,用户指示每帧的ATM信元的最大数量,并且当超过最大数量时,发送使用该号码的ATM信元,丢弃相关联的帧或使用第一算法。 本发明通过定义其应用程序导致此方法的规则现在仅在非常有限的程度上使用来解决此问题。

    Process for storing transmission units and a network communications device
    8.
    发明申请
    Process for storing transmission units and a network communications device 有权
    用于存储传输单元和网络通信设备的过程

    公开(公告)号:US20050157757A1

    公开(公告)日:2005-07-21

    申请号:US10967081

    申请日:2004-10-14

    申请人: Raimar Thudt

    发明人: Raimar Thudt

    IPC分类号: H04L12/54 H04J3/16

    摘要: The present invention relates to a process for storing transmission units in interworking between networks of differing protocol structure, in particular between ATM networks and Ethernet networks, and a corresponding network communications device. In accordance with the invention a storage in a segmented memory (10) is proposed in which the segmentation is chosen in such a way that the length of a segment of the segmented memory (10) corresponds to the length of the payload of an ATM cell. The storage of transmission units in the segmented memory (10) is preferably effected in the form of lists (40) which comprise descriptor segments (100) and data segments (200). The invention facilitates efficient storage and processing of transmission units with differing data structure and length.

    摘要翻译: 本发明涉及用于将传输单元存储在不同协议结构的网络之间,特别是在ATM网络和以太网之间的互通中的过程,以及相应的网络通信设备。 根据本发明,提出了分段存储器(10)中的存储器,其中以这样的方式选择分段,使得分段存储器(10)的段的长度对应于ATM信元的有效载荷的长度 。 传输单元在分段存储器(10)中的存储优选地以包括描述符段(100)和数据段(200)的列表(40)的形式进行。 本发明有助于有效地存储和处理具有不同数据结构和长度的传输单元。

    Data packet processing device
    9.
    发明申请
    Data packet processing device 有权
    数据包处理装置

    公开(公告)号:US20080183907A1

    公开(公告)日:2008-07-31

    申请号:US11698670

    申请日:2007-01-26

    申请人: Raimar Thudt

    发明人: Raimar Thudt

    IPC分类号: G06F3/00

    摘要: A device for data packet processing is disclosed. In one embodiment, the device includes a processor implemented on a chip, an on-chip internal segment memory accessible by the processor, an off-chip external segment memory and a data transfer channel between the internal segment memory and the external segment memory. The external segment memory comprises first and second memory segments wherein the first and second memory segments are different in size.

    摘要翻译: 公开了一种用于数据分组处理的设备。 在一个实施例中,该设备包括在芯片上实现的处理器,由处理器可访问的片上内部段存储器,片外外部段存储器和内部段存储器与外部段存储器之间的数据传输通道。 外部段存储器包括第一和第二存储器段,其中第一和第二存储器段的大小不同。

    Method for removal of ATM cells from an ATM communications device

    公开(公告)号:US07180859B1

    公开(公告)日:2007-02-20

    申请号:US09673435

    申请日:1999-03-23

    IPC分类号: H04L12/26

    摘要: The invention discloses removal of ATM cells from an ATM communications device. A first algorithm is provided by means of which, with the exception of a first and a last ATM cell in a frame, all newly arriving cells in the frame are removed. A second algorithm is provided by means of which all the ATM cells in a frame, from a first cell to a last cell, are removed on arrival in a queue from the ATM communications device. At a start of a transmission process, a user indicates a maximum number of ATM cells per frame, and the ATM cells using the number are transmitted when the maximum number is exceeded, the associated frame is discarded or the first algorithm is used. The invention solves this problem by defining rules whose application results in this method now being used only to a very limited extent.