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    QC-LDPC coding methods and apparatus
    4.
    发明授权
    QC-LDPC coding methods and apparatus 有权

    公开(公告)号：US10164659B2

    公开(公告)日：2018-12-25

    申请号：US15594239

    申请日：2017-05-12

    Applicant: MediaTek Inc.

    Inventor： Mao-Ching Chiu ,  Chong-You Lee ,  Cheng-Yi Hsu ,  Timothy Perrin Fisher-Jeffes ,  Yen-Shuo Chang ,  Wei-Jen Chen ,  Ju-Ya Chen

    IPC: H03M13/11 ,  H04L1/00 ,  H03M13/00 ,  H04L1/18

    Abstract: Concepts and schemes pertaining to quasi-cyclic-low-density parity-check (QC-LDPC) coding are described. A processor of an apparatus may generate a QC-LDPC code having a plurality of codebooks embedded therein. The processor may select a codebook from the plurality of codebooks. The processor may also encode data using the selected codebook. Alternatively or additionally, the processor may generate the QC-LDPC code including at least one quasi-row orthogonal layer. Alternatively or additionally, the processor may generate the QC-LDPC code including a base matrix a portion of which forming a kernel matrix that corresponds to a code rate of at least a threshold value.

    NR LDPC With Interleaver
    5.
    发明申请
    NR LDPC With Interleaver 审中-公开

    公开(公告)号：US20180131392A1

    公开(公告)日：2018-05-10

    申请号：US15802265

    申请日：2017-11-02

    Applicant: MediaTek Inc.

    Inventor： Timothy Perrin Fisher-Jeffes ,  Wei-Jen Chen ,  Ju-Ya Chen ,  Mao-Ching Chiu ,  Yen-Shuo Chang ,  Cheng-Yi Hsu

    IPC: H03M13/25 ,  H03M13/27 ,  H04L1/00

    CPC classification number: H03M13/255 ,  H03M13/116 ,  H03M13/27 ,  H03M13/2742 ,  H03M13/6306 ,  H04L1/0041 ,  H04L1/0071

    Abstract: Concepts and schemes pertaining to information coding for mobile communications are described. A processor of an apparatus encodes data to provide encoded data. The processor also transmits the encoded data to a network node of a wireless network. In encoding the data, the processor encodes the data with a low-density parity-check (LDPC) code to provide LDPC-coded data. Moreover, the processor processes the LDPC-coded data with a forward error correction (FEC) robustness enhancement function to provide the encoded data. The FEC robustness enhancement function includes an interleaving function that interleaves the LDPC-coded data to provide the encoded data, an interlacing function that interlaces the LDPC-coded data to provide the encoded data, or a bit-reordering function that reorders bits of the LDPC-coded data to provide the encoded data.

    HARQ Buffer Size Design For Communication Systems
    7.
    发明申请
    HARQ Buffer Size Design For Communication Systems 审中-公开

    公开(公告)号：US20190103944A1

    公开(公告)日：2019-04-04

    申请号：US16149085

    申请日：2018-10-01

    Applicant: MediaTek Inc.

    Inventor： Wei-De Wu ,  Timothy Perrin Fisher-Jeffes ,  Yen-Shuo Chang ,  Chia-Wei Tai ,  Hsien-Kai Hsin ,  Pei-Kai Liao

    IPC: H04L1/18 ,  H04L1/00

    Abstract: Techniques and examples of hybrid automatic repeat request (HARQ) buffer size design for communication systems are described. A user equipment (UE) communicates with a serving cell of a wireless network using a HARQ mechanism, with the communicating involving: (a) determining, by the processor, a respective size of each buffer of a plurality of buffers corresponding to a plurality of HARQ processes on a per-HARQ process basis; and (b) storing, by the processor, respective information in each buffer of the plurality of buffers for a corresponding HARQ process among the plurality of HARQ processes.

    Location of interleaver with LDPC code
    9.
    发明授权
    Location of interleaver with LDPC code 有权

    公开(公告)号：US10432227B2

    公开(公告)日：2019-10-01

    申请号：US15878350

    申请日：2018-01-23

    Applicant: MediaTek Inc.

    Inventor： Wei-Jen Chen ,  Ju-Ya Chen ,  Yen-Shuo Chang ,  Timothy Perrin Fisher-Jeffes ,  Mao-Ching Chiu ,  Cheng-Yi Hsu ,  Chong-You Lee

    IPC: H03M13/00 ,  H03M13/27 ,  H03M13/29 ,  H03M13/11

    Abstract: Concepts and schemes pertaining to location of interleaver with low-density parity-check (LDPC) code are described. A processor of an apparatus encodes data to provide a stream of encoded data. The processor also rate matches the encoded data to provide a rate-matched stream of encoded data. The processor further interleaving the rate-matched stream of encoded data. In rate matching the encoded data, the processor buffers the stream of encoded data in a circular buffer, with the circular buffer functioning as a rate matching block that rate matches the stream of encoded data. In interleaving the rate-matched stream of encoded data, the processor performs bit-level interleaving on the rate-matched stream of encoded data to provide a stream of interleaved data.

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